Stepped-Trench Resistor Stacks for Compact Chip Layouts
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Solution Overview
Problem
Conventional serpentine resistors occupy a large area on semiconductor chips, limiting the available space for other circuitry and making it challenging to achieve desired resistance values efficiently.
Innovation Solution
The development of resistor devices that utilize stacks of electrically resistive materials within stepped trenches on a substrate, reducing the chip area occupied by resistors and allowing for more compact designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional serpentine resistors are used, then desired resistance values can be achieved, but the chip area occupied is large
Solution Approach 1:
The patent transitions from planar serpentine resistor layouts to vertical stacked configurations. Multiple resistive material layers are stacked vertically within a trench structure, utilizing the third dimension (depth) to achieve the required resistance values without expanding the horizontal chip footprint. This dimensional change directly resolves the contradiction by maintaining resistance functionality while dramatically reducing occupied area.
Solution Approach 2:
The patent implements nested structures where resistive material layers are stacked within a trench that is etched into the substrate. Each resistive layer is nested within the vertical space of the trench, with insulating and conductive layers interleaved. This nesting approach allows multiple functional layers to occupy the same horizontal footprint, achieving high resistance values in a compact volume.
2Area of stationary object
If chip area is reduced for resistor devices, then more space is available for other circuitry, but achieving desired resistance values becomes more challenging
Solution Approach 1:
The patent employs parameter changes by varying the thickness, resistivity, and lateral dimensions of individual resistive material layers to precisely control the total resistance value. By adjusting these parameters across multiple stacked layers, the desired resistance can be achieved within a compact footprint. The method also involves changing the geometric parameters of the trench (depth, width) to optimize the resistance while minimizing area.
Solution Approach 2:
The patent segments the total resistance into multiple discrete resistive layers stacked vertically. Each layer contributes a portion of the total resistance, allowing precise control through individual layer design. This segmentation enables the achievement of accurate resistance values by summing the contributions of multiple thin layers, each with optimized parameters for compact integration.
3Area of stationary object
If stacks of electrically resistive materials are used in stepped trenches, then chip area is reduced by about two-thirds, but device complexity increases
Solution Approach 1:
The patent implements multi-functional layers where certain material stacks serve multiple purposes. For example, conductive contact layers at the bottom and top of the trench structure provide both mechanical support and electrical connectivity. The etch stop layers serve both as process control elements during fabrication and as structural components defining the trench boundaries. This multi-functionality reduces the need for separate dedicated structures, thereby limiting the increase in overall device complexity despite the compact stacked design.
Data Source
AI summary
A method of manufacturing a resistor device includes forming a stepped trench in a substrate, and forming an etch stop material within the stepped trench. An electrically resistive material is disposed within the stepped trench, and an electrically insulating material is disposed on the electrically resistive material. The method further includes repeating the disposing the electrically resistive material and the disposing the electrically insulating material operations a predetermined number of times.