Stepped Trench Semiconductor Device for Reduced ON Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing semiconductor devices, such as MOSFETs, face limitations in reducing ON resistance due to the constraints on trench density and gap size between trenches, which hinders the improvement of current capability.
Innovation Solution
A semiconductor device design featuring a trench with an upper part wider than the lower part, along with a specific fabrication method that includes forming a gate insulating layer, interlayer insulating layer, source region, body region, and highly doped impurity region, allows for increased trench density by minimizing cell pitch through controlled oxidation and etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of trenches per unit area is increased to lower ON resistance, then the current capability is improved, but the cell pitch reduction is limited by the gap between trench and contact opening
Solution Approach 1:
The patent transitions from a conventional straight trench to a stepped trench structure with multiple levels. The first trench extends to a first depth, while the second trench extends to a second depth greater than the first depth, creating a vertical dimensionality change that allows source regions to contact trenches at different depths, thereby reducing the required horizontal gap and cell pitch.
Solution Approach 2:
The trench structure is segmented into multiple discrete trenches at different depths rather than a single continuous trench. This segmentation allows independent optimization of each trench's position and depth, enabling closer spacing while maintaining proper source region contact and electrical isolation.
2Quantity of substance
If the gap between trench and contact opening is reduced to increase trench density, then more trenches can be packed per unit area, but the source region formation becomes constrained
Solution Approach 1:
By introducing vertical depth variation with stepped trenches, the patent allows source regions to form and contact trenches at different vertical levels. This eliminates the need for large horizontal gaps, as the additional vertical dimension provides the necessary space for source region formation while maintaining close trench spacing.
Solution Approach 2:
The patent forms the stepped trench structure and gate insulating layers before forming the source regions. This preliminary structuring establishes the vertical depth variations that will subsequently guide source region formation and contact, ensuring proper alignment and reducing manufacturing complexity.
3Ease of manufacture
If conventional straight trenches are used, then the fabrication process is simpler, but the ON resistance cannot be reduced below a certain threshold
Solution Approach 1:
The patent introduces vertical depth variation with stepped trenches, allowing source regions to contact trenches at different depths. This dimensional change increases trench density and reduces ON resistance while maintaining a fabrication process that builds upon conventional techniques with added etching and deposition steps.
Solution Approach 2:
Different portions of the trench structure have different depths and functions. The first trench provides initial gate formation, while the second trench at greater depth enables additional source region contact, creating local variations in structure quality that optimize electrical performance without complicating the overall fabrication flow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces ON resistance by increasing trench density and cell density, achieving a 20-30% reduction in ON resistance value while maintaining reliable contact between the source and body regions.
Implementation Method 1
forming a gate insulating layer on an inner surface of the trench
Implementation Method 2
forming a source region within the substrate and contacting a sidewall of an upper trench part of the trench
Data Source
AI summary
A semiconductor device and a fabricating method thereof are provided. The semiconductor device includes: a trench disposed within a substrate, the trench comprising an upper trench part that is wider than a lower trench part in width; a gate disposed in the trench; an interlayer insulating layer pattern disposed above the gate in the upper trench part; a source region disposed within the substrate and contacting a sidewall of the upper trench part; a body region disposed below the source region in the substrate; and a contact trench disposed above the body region and filled with a conductive material.