Stepper Motor Speed Ramp Control via DMA and NCO
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Solution Overview
Problem
Existing stepper motor speed control methods require significant software overhead and CPU intervention for acceleration and deceleration, which reduces performance and increases complexity, especially in high-step-rate applications.
Innovation Solution
Implementing direct memory access (DMA) transfers to automate the loading of prescale values into a numerically controlled oscillator (NCO) for stepper motor speed ramp control, reducing CPU intervention and improving execution timing by using a table of acceleration and deceleration prescale values stored in memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If software running on CPU provides new prescaler NCO values for speed ramp control, then stepper motor acceleration and deceleration can be controlled, but CPU loading increases and performance of other software functions decreases
Solution Approach 1:
A dedicated hardware circuit is introduced as an intermediary between the CPU and the NCO. This hardware circuit autonomously generates speed ramp control signals and loads prescaler values into the NCO without requiring CPU intervention, thereby automating the speed ramp control function while reducing CPU loading and software overhead.
2Reliability
If CPU provides prescaler NCO values during high-speed operation, then stepper motor can maintain lock at high step rates, but software instruction execution timing is degraded due to high priority interrupts
Solution Approach 1:
The hardware circuit is designed to be self-sufficient in generating speed ramp control signals. It automatically monitors the stepper motor operation and independently adjusts the NCO prescaler values to maintain lock at high step rates, eliminating the need for CPU interrupts and thereby preserving software execution timing while ensuring reliable motor control.
3Productivity
If automated speed ramp control is implemented using DMA transfers, then CPU loading is reduced and software overhead is minimized, but additional hardware circuitry is required
Solution Approach 1:
The patent replaces the software-based speed ramp control mechanism with a hardware-based solution. The hardware circuit directly generates control signals and manages prescaler value loading, substituting the mechanical/software control loop with an electronic hardware system that operates autonomously, thereby reducing CPU loading while introducing dedicated hardware circuitry.
Data Source
AI summary
Automated speed ramp control of stepper motor acceleration and deceleration using direct memory access (DMA) and core independent peripherals (CIPs) comprises a numerically controlled oscillator (NCO) controlled through direct memory access (DMA) transfers of prescale values used in combination with a clock oscillator to generate clock pulses that are a function of the clock oscillator frequency and the prescale values. This automates changing the frequency of the NCO, thereby controlling steeper motor speed, without requiring computer processing unit (CPU) overhead. The DMA module is enabled during a first number of clock pulses for step speed acceleration, disabled during a second number of clock pulses for normal operation at full step speed, and then re-enabled during a third number of clock pulses for step speed deceleration. A table in memory may store and provide a plurality of acceleration and deceleration prescale values for DMA transfers to the NCO.