Stepper-Shaped Conductive Pillar for Flip Chip Package Reliability
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Solution Overview
Problem
Reducing bump pitch in flip chip Chip Scale Packages (fcCSP) by shrinking metal trace width leads to issues like delamination, solder bridging, and peeling due to coefficient of thermal expansion mismatch and inadequate stand-off distance, which complicates testing and underfill introduction.
Innovation Solution
The use of stepper-shaped conductive pillars and partially embedded metal traces with protruding bonding pads, where the bonding pad height is greater than or equal to the conductive pillar height, maintains a sufficient stand-off distance and prevents delamination, bridging, and peeling, while allowing for effective testing and underfill flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the width of metal traces is reduced to decrease bump pitch, then the package size can be reduced, but delamination and peeling occur due to coefficient of thermal expansion mismatch
Solution Approach 1:
The metal trace is segmented into two distinct parts: an embedded portion within the substrate and a protruding bonding pad portion extending above the substrate surface. This segmentation allows the embedded trace to provide mechanical support and thermal expansion compensation, while the protruding portion maintains electrical connectivity without being constrained by the substrate, thereby preventing delamination and peeling
Solution Approach 2:
The metal trace configuration transitions from a purely planar two-dimensional layout to a three-dimensional structure by having the bonding pad portion protrude vertically above the substrate surface. This dimensional change provides adequate stand-off distance between adjacent traces, preventing solder bridging while maintaining reduced bump pitch
2Productivity
If the width of metal traces is reduced to decrease bump pitch, then the package density increases, but solder bridging occurs between adjacent traces
Solution Approach 1:
By elevating the bonding pad portion above the substrate surface, the design introduces a vertical dimension that increases the clearance between adjacent traces. This three-dimensional configuration maintains high package density through reduced bump pitch while preventing solder bridging through the elevated stand-off distance
3Volume of moving object
If the stand-off distance between adjacent bumps is reduced to decrease bump pitch, then the package size decreases, but testing becomes complicated
Solution Approach 1:
The protruding bonding pad portion creates vertical clearance that provides adequate access for testing probes to contact the bonding pads from above. This three-dimensional configuration allows standard testing procedures to be performed even when the horizontal bump pitch is reduced, eliminating testing complications
4Volume of moving object
If the stand-off distance between adjacent bumps is reduced to decrease bump pitch, then the package size decreases, but underfill introduction becomes complicated
Solution Approach 1:
The elevated bonding pad portion creates vertical space that facilitates the flow and distribution of underfill material between the substrate and the integrated circuit chip. This three-dimensional configuration ensures adequate underfill introduction even when the horizontal bump pitch is reduced, maintaining ease of manufacture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of the package by preventing delamination, bridging, and peeling, while enabling reliable testing and ensuring smooth underfill introduction, even at reduced bump pitches.
Implementation Method 1
a solder feature electrically coupling the conductive pillar to the bonding pad portion of the metal trace
Data Source
AI summary
An embodiment package includes a conductive pillar mounted on an integrated circuit chip, the conductive pillar having a stepper shape, a metal trace partially embedded in a substrate, the metal trace having a bonding pad portion protruding from the substrate, and a solder feature electrically coupling the conductive pillar to the bonding pad portion of the metal trace.


