STI Air Gap Formation via Halogen-Adhered Liner Etching
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Solution Overview
Problem
Existing fabrication techniques for high-density semiconductor devices, such as NAND flash memory, are insufficient in forming deep shallow trench isolation (STI) air gaps, which limits the reduction of parasitic capacitance and increases the size of memory devices due to damage to dielectric layers during etching processes.
Innovation Solution
A method involving forming a trench in a semiconductor substrate, adhering a halogen element to a dielectric liner, depositing a polysilazane material, annealing to increase porosity, and isotropically etching to create deep air gaps in STI trenches without damaging the dielectric layers, allowing for reduced parasitic capacitance and increased storage density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to form STI air gaps, then the air gaps can be formed, but the dielectric layers are damaged
Solution Approach 1:
The patent segments the etching process into multiple controlled stages: forming a trench, depositing a first dielectric liner, adding a halogen-containing layer, depositing a second dielectric material, and performing selective isotropic etching. This segmentation allows each layer to be processed and protected independently, preventing damage to underlying dielectric layers while achieving the desired air gap formation.
Solution Approach 2:
The patent introduces a halogen-containing layer as an intermediary between the first dielectric liner and the second dielectric material. This intermediary layer serves as a sacrificial element that enables selective etching of the second dielectric material to form air gaps, while the first dielectric liner protects the underlying structure. The halogen-containing layer mediates the etching process to achieve deep air gaps without damaging critical dielectric layers.
2Productivity
If deep STI air gaps are formed to reduce parasitic capacitance, then storage density increases, but the etching process damages dielectric layers
Solution Approach 1:
The patent changes the chemical parameters of the dielectric layers by incorporating halogen-containing materials and using specific dielectric compositions with different etch selectivities. This allows the etching process to selectively remove the second dielectric material to form deep air gaps while leaving the first dielectric liner and other critical layers intact, achieving both deep air gaps and dielectric layer protection simultaneously.
Solution Approach 2:
The patent uses composite material structures with multiple dielectric layers having different compositions and properties. The first dielectric liner and second dielectric material are designed with different etch selectivities, allowing selective removal of the second layer. This composite approach enables formation of deep air gaps while maintaining the integrity of other dielectric layers, thus increasing storage density without compromising manufacturing precision.
3Quantity of substance
If existing fabrication techniques are used, then current device density is achieved, but further density increase is limited due to inability to form deep air gaps
Solution Approach 1:
The patent performs preliminary actions by depositing the first dielectric liner and halogen-containing layer before forming the second dielectric material. This preliminary structuring enables subsequent selective etching to create deep air gaps that reduce parasitic capacitance and allow higher storage density. The preliminary actions prepare the structure for advanced fabrication techniques that overcome the limitations of existing methods.
Solution Approach 2:
The patent replaces conventional mechanical or physical etching methods with a chemically-driven selective etching process. By using halogen-containing layers and dielectric materials with different chemical etch selectivities, the process achieves deep air gap formation without the mechanical damage associated with traditional etching methods, enabling further density increases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of deep STI air gaps without damaging the dielectric layers, effectively reducing parasitic capacitance and enhancing storage density in high-density semiconductor devices.
Implementation Method 1
adhering a halogen element to the liner
Implementation Method 2
annealing the structure to increase a porosity of the second dielectric material
Implementation Method 3
isotropically etching the exposed portion of the surface of the second dielectric material to form an air gap
Data Source
AI summary
A method of forming a shallow trench isolation trench in a semiconductor substrate is described. The method includes forming a trench in a region of the substrate, forming a liner in the trench, wherein the liner includes a first dielectric material, adhering a halogen element to the liner, forming a second dielectric material in the trench, annealing the first dielectric material and the second dielectric material, exposing a portion of a surface of the second dielectric material, and isotropically etching the exposed portion of the surface of the second dielectric material to form an air gap in the shallow trench isolation trench.