STI Overhang Structure for Source-Drain Stressor Uniformity
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Solution Overview
Problem
Trench isolation structures in semiconductor manufacturing lead to faceted growth of source/drain stressor material, resulting in thinner final thickness, increased junction leakage, and reduced stress, which compromises device performance. Additionally, existing solutions like tucking the STI under a dummy gate introduce parasitic capacitance and layout area penalties.
Innovation Solution
The implementation of a shallow trench isolation (STI) structure with an overhang, where source and drain recesses are formed adjacent to the STI structure and bounded by substrate material, allowing for epitaxial growth without the need for a dummy gate, thereby minimizing faceted growth and eliminating parasitic capacitance and layout penalties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If STI structure is formed with conventional method, then isolation is achieved, but faceted growth occurs causing thinner source/drain thickness
Solution Approach 1:
The patent introduces a dummy gate structure that extends in the width direction (parallel to gate) in addition to the length direction (perpendicular to gate). This 2D extension creates substrate material coverage on both length and width sides of the source/drain region, preventing faceted growth in multiple directions simultaneously and ensuring uniform epitaxial thickness.
2Manufacturing precision
If dummy gate is added to prevent faceting, then source/drain thickness is improved, but parasitic capacitance increases
Solution Approach 1:
The patent uses a dummy gate that replicates the structure and material composition of the actual gate stack. This copying approach allows the dummy gate to provide the necessary substrate masking function while maintaining electrical isolation, thereby minimizing parasitic capacitance effects compared to using different materials or structures.
3Manufacturing precision
If dummy gate is used to mask substrate, then epitaxial growth is improved, but layout area increases
Solution Approach 1:
The patent applies the dummy gate structure selectively only at critical locations where STI edges are present and faceted growth is a concern. The dummy gate extends partially in both length and width directions to provide local substrate masking precisely where needed, rather than uniformly across the entire device area, thus minimizing layout area penalty.
4Ease of manufacture
If STI edge is exposed during recess etch, then recess formation is simplified, but junction leakage increases
Solution Approach 1:
The patent introduces the dummy gate as an intermediary structure that indirectly protects the STI edge region during recess etching. The dummy gate acts as a spacer that masks substrate material adjacent to the STI edge, preventing complete exposure of the STI edge while still allowing the recess etch to proceed to the required depth, thus reducing junction leakage without overly complicating the process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces junction leakage, increases stress in source/drain regions, and enhances device performance by maintaining substrate material along the STI sidewalls, thus improving the overall performance of semiconductor devices.
Implementation Method 1
These embedded stressors are grown epitaxially after a recess etch into the source/drain regions is performed
Data Source
AI summary
A trench isolation structure and method of forming the trench isolation structure are disclosed. The method includes forming a shallow trench isolation (STI) structure having an overhang and forming a gate stack. The method further includes forming source and drain recesses adjacent to the STI structure and the gate stack. The source and drain recesses are separated from the STI structure by substrate material. The method further includes forming epitaxial source and drain regions associated with the gate stack by filling the source and drain recesses with stressor material.