Buried STI Power Rail Layout for Higher-Density IC Routing
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Solution Overview
Problem
The semiconductor industry faces challenges in miniaturization, increased complexity, and reduced routing area due to the demand for higher integration density, lower power consumption, and faster speeds, particularly in forming efficient power rails within the shrinking chip layout.
Innovation Solution
A semiconductor structure with a buried power rail embedded in the shallow trench isolation (STI) region, where the power rail is formed below the doping regions of transistors and extends in a specific direction, allowing for electrical connection to the well region and simplifying the layout by reducing the need for traditional metal layer power rails.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional metal layer power rails are used, then power distribution is achieved, but layout complexity increases and routing area for signals decreases
Solution Approach 1:
The patent merges the power rail function with the existing STI region structure. Instead of using separate metal layers for power distribution, the power rails are formed by doping the STI region itself, combining two functions (isolation and power distribution) into a single structural element, thereby reducing layout complexity and freeing up routing area.
Solution Approach 2:
The patent transitions power rail formation from the horizontal metal layer dimension to the vertical doping region dimension. By forming power rails through doping in the STI region rather than through metal deposition in separate layers, the solution utilizes the vertical stacking dimension to achieve power distribution, simplifying the horizontal layout.
2Productivity
If integration density is increased through miniaturization, then more components fit on chip, but routing area decreases and layout becomes more difficult
Solution Approach 1:
The STI region is given multiple functions: it continues to serve as electrical isolation between devices while simultaneously serving as the medium for power rail formation. This multi-functionality allows the structure to support higher integration density without sacrificing routing area, as the same region provides both isolation and power distribution.
Solution Approach 2:
By combining the isolation function and power distribution function into the single STI region structure, the patent eliminates the need for additional dedicated power rail structures that would consume routing area. This merging enables higher integration density while preserving signal routing space.
3Ease of manufacture
If power rails are formed in separate metal layers, then power distribution is achieved, but additional manufacturing steps and process complexity increase
Solution Approach 1:
The power rails are formed during the preliminary STI formation process rather than in later metal deposition steps. By doping the STI region early in the manufacturing sequence, the power rail structure is established before device assembly, reducing the number of subsequent manufacturing steps required and simplifying the overall process.
Solution Approach 2:
The patent merges the STI formation process with the power rail formation process. Instead of treating them as separate manufacturing steps (forming STI, then forming separate metal power rails), the doping of the STI region accomplishes both functions simultaneously, reducing process complexity and manufacturing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces layout complexity and increases routing area for signals, enabling more efficient design and manufacturing of integrated circuits by embedding power rails within the STI region, thus addressing the challenges of miniaturization and integration density.
Implementation Method 1
Each of the doping regions is electrically connected to the power rail, so as to form a source region of the respective transistor
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a shallow trench isolation (STI) region on a well region of a substrate, a plurality of transistors, and a power rail. Each of the transistors includes at least one fin, a gate electrode formed on the fin, and a doping region formed on the fin. The fin is formed on the well region, and is extending in a first direction. The gate electrode is extending in a second direction that is perpendicular to the first direction. The power rail is formed in the STI region and below the doping regions of the transistors, and extending in the first direction. Each of the doping regions is electrically connected to the power rail, so as to form a source region of the respective transistor. The power rail is electrically connected to the well region of the substrate.