Semiconductor Package Stiffener Frame Lid Adhesive Setback

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Solution Overview

Problem

Conventional semiconductor chip packages experience warpage due to mismatches in thermal expansion coefficients, leading to potential substrate damage and electrical issues, and existing stiffener rings often cause adhesive bleeding and particle contamination.

Innovation Solution

A stiffener frame with a central opening and an outer edge surface is coupled to a substrate, and a lid with a flange is secured to the frame with an adhesive set back from the edge, preventing adhesive bleeding and particle contamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a conventional stiffener ring is used with a flat outer surface vertically aligned with the lid, then the substrate warpage is reduced, but adhesive bleeds out laterally and causes particle contamination

Engineering Contradiction:
Improvesubstrate warpageVSAvoidadhesive bleeding and particle contamination
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The stiffener frame is designed with an asymmetric profile where the outer edge surface is offset relative to the inner edge surface, creating a non-uniform geometry that prevents adhesive from reaching the lateral edges while maintaining structural stability and reducing substrate warpage

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The solution moves the adhesive containment problem from a two-dimensional lateral spread issue to a three-dimensional controlled application space, where the adhesive is confined to a specific setback region between the offset edge surfaces, preventing lateral bleeding while maintaining bond strength

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the electrical pathways in package substrates are reduced to lower power supply inductance, then power fidelity is improved, but substrate warping is induced

Engineering Contradiction:
Improvepower fidelityVSAvoidsubstrate warping
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The stiffener frame acts as a counterbalancing structural element that compensates for the warping induced by shortened electrical pathways, providing opposing mechanical support that maintains substrate flatness while allowing the electrical pathways to be optimized for low inductance

Inventive Principle:
Principle #8Anti-weight (Counterweight)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces substrate warpage and prevents adhesive-related electrical issues by containing the adhesive and maintaining structural integrity, enhancing the reliability of semiconductor chip packages.

Implementation Method 1

A lid is coupled to the stiffener frame with an adhesive

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS8216887B2Semiconductor chip package with stiffener frame and configured lid
Publication Date: 2012.07.10 ADVANCED MICRO DEVICES INC
  • US8216887B2 patent drawing
  • US8216887B2 patent drawing
  • US8216887B2 patent drawing

AI summary

Various semiconductor chip packages and methods of assembling and making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a stiffener frame to a first side of a substrate. The stiffener frame has a central opening to accommodate a semiconductor chip and an outer edge surface. A semiconductor chip is coupled to the first side in the opening. A lid is coupled to the stiffener frame with an adhesive. The lid has a first edge surface set back from the outer edge surface of the stiffener frame. The adhesive is set back from the outer edge surface of the stiffener frame.