Stiffener Ring Power Planes for Low-IR-Drop ASIC Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current power delivery options for high-speed data centers and service provider systems face challenges with large IR drops and power dissipation in ASIC pinfields, leading to increased manufacturing difficulties, costs, and cooling issues due to resistance in LGA sockets and fine pitch BGA configurations.
Innovation Solution
A stiffener ring with a first conductive layer forming a power plane, a second conductive layer forming a ground plane, and an insulating layer between them, providing structural rigidity and efficient high-current power delivery to ASICs while reducing IR dissipation, and facilitating decoupling with low inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a large orthogonal package with LGA socket is used for power delivery, then the package size is increased, but the IR drop and power dissipation in ASIC pinfield are reduced
Solution Approach 1:
The patent combines the stiffener ring structure with power delivery planes, merging mechanical support function with electrical power delivery function into a single integrated component. This eliminates the need for separate power delivery mechanisms while providing both structural rigidity and low-impedance power paths to the ASIC pinfield.
Solution Approach 2:
The patent transitions from planar power delivery (2D) to three-dimensional power delivery by stacking multiple power and ground planes vertically within the stiffener ring structure. This adds the vertical dimension (Z-axis) for power delivery, enabling low-impedance paths without increasing the horizontal package footprint.
2Area of stationary object
If a smaller hex package with fine pitch BGA configuration is used, then the package size is reduced, but the IR drop and power dissipation increase due to Swiss cheese layering
Solution Approach 1:
The patent merges the stiffener ring with power delivery planes, creating an integrated structure that provides both mechanical support and electrical power delivery. This combination enables effective power delivery in a compact hex package without the Swiss cheese layering problem by providing continuous power and ground planes around the periphery.
Solution Approach 2:
The patent concentrates power and ground planes at the periphery of the package in the stiffener ring region, creating high-current carrying paths where they are most needed for feeding the ASIC pinfield. This local concentration of conductive materials provides low-impedance power delivery without requiring full coverage across the entire package area.
3Area of stationary object
If fine pitch BGA configuration is used to reduce package size, then the number of BGA contacts is increased, but the manufacturing complexity and cost increase
Solution Approach 1:
The patent extracts the power delivery function from the BGA contact array and relocates it to the periphery through the stiffener ring structure. This extraction reduces the number of BGA contacts needed for power delivery, simplifying the manufacturing process and reducing cost while maintaining compact package size.
Solution Approach 2:
The patent moves power delivery from the planar BGA contact layer to the vertical periphery region through the stiffener ring. This dimensional transition allows power and ground planes to be stacked vertically, reducing the number of horizontal BGA contacts required while maintaining effective power delivery capability.
4Loss of energy
If conventional power delivery structures are used, then the PCB layering requirements increase, but the manufacturing difficulty and cost increase
Solution Approach 1:
The patent combines multiple power and ground planes into a compact stacked configuration within the stiffener ring structure. This merging provides complete decoupling and low-impedance power delivery without requiring numerous separate PCB layers, thereby reducing PCB layering requirements while maintaining power delivery efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances DC and AC performance, reduces the number of PCB layers and BGA contacts, and minimizes package size, thereby addressing the issues of IR drops and power dissipation in ASIC pinfields.
Implementation Method 1
a first conductive layer forming a power (PWR) plane for the integrated circuit, a second conductive layer forming a ground (GND) plane for the integrated circuit
Implementation Method 2
delivers electrical power to the integrated circuit... reducing IR dissipation
Implementation Method 3
an insulating layer disposed between the first conductive layer and the second conductive layer
Implementation Method 4
a stiffener ring secured to the package substrate... The stiffener ring increases a rigidity of the package substrate
Data Source
AI summary
An apparatus includes a printed circuit board (PCB), and an integrated circuit (IC) package connected with the PCB. The IC package includes a package substrate, a die secured to the package substrate and including an integrated circuit, and a stiffener ring secured to the package substrate and surrounding so as to define a perimeter around the die. The stiffener ring increases a rigidity of the package substrate and delivers electrical power to the integrated circuit, where the stiffener ring includes a first conductive layer forming a power (PWR) plane for the integrated circuit, a second conductive layer forming a ground (GND) plane for the integrated circuit, and an insulating layer disposed between the first conductive layer and the second conductive layer.


