Stiffener Set for Semiconductor Package Warpage Resistance

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Solution Overview

Problem

Semiconductor packages designed for next-generation high-performance communication devices are prone to warpage due to external physical stress, compromising their structural integrity.

Innovation Solution

Incorporating a stiffener set with different coefficients of thermal expansion (CTEs) on the edge area of the substrate, attached via an adhesive member, to balance external physical forces and mitigate warpage, while maintaining chip and memory stack placement on the interposer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If the semiconductor package is designed to be thin for mobile communication, then the package size is reduced and portability is improved, but the package becomes weak against external physical stress such as warpage

Engineering Contradiction:

Improvepackage thicknessVSAvoidresistance to warpage

Core Design Contradiction:

Length of moving objectVSStrength

Solution Approach 1:

The stiffener is divided into multiple segments (first stiffener and second stiffener) that are spaced apart from each other, allowing the structure to maintain flexibility while providing distributed support against warpage forces

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The stiffener comprises a core member and a plated layer with different coefficients of thermal expansion, creating a composite structure that provides both mechanical strength and thermal stability to resist warpage in thin packages

Inventive Principle:

Principle #40Composite materials

2Strength

If a stiffener is added to the substrate edge area, then the resistance to warpage is improved, but the device complexity increases

Engineering Contradiction:

Improveresistance to warpageVSAvoidpackage structure complexity

Core Design Contradiction:

StrengthVSDevice complexity

Solution Approach 1:

The stiffener structure is designed to mirror or complement the substrate geometry, with the plated layer conforming to the core member shape, simplifying the manufacturing process while providing effective warpage resistance

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The stiffener's physical and chemical properties are optimized by controlling the plated layer thickness and composition, allowing adjustment of mechanical properties to match substrate requirements without over-engineering the structure

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively enhances the semiconductor package's resistance to warpage and external physical stress, ensuring structural stability and performance reliability.

Implementation Method 1

a stiffener set on the edge area of the substrate, the stiffener set including a plurality of stiffeners having different coefficients of thermal expansion (CTEs), respectively

Methodology Applied

Scientific EffectCoefficient of thermal expansion (CTE): Thermal Expansion

Data Source

PatentUS20230207487A1Semiconductor package including stiffener

Publication Date: 2023.06.29 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor package including a substrate including, at an upper surface thereof, an inner area and an edge area surrounding the inner area, a chip set on the inner area of the substrate, a stiffener set on the edge area of the substrate, the stiffener set including a plurality of stiffeners spaced apart from one another, and an adhesive member attaching the plurality of stiffeners to the substrate may be provided.