Stress Tuned Stiffeners for Microelectronics Warpage Control

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Solution Overview

Problem

Semiconductor device assemblies experience warpage due to mismatched coefficients of thermal expansion (CTE) of their components, leading to stress on the assembly and reliability issues with solder joints, especially during elevated temperature processes like reflow.

Innovation Solution

The introduction of tunable stiffener members with specific coefficients of thermal expansion, shape, location, and material properties to counteract warpage stress, reducing warpage to acceptable levels and ensuring proper connection between semiconductor devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If semiconductor devices are stacked to increase density and thickness is decreased, then device density increases, but warpage control becomes more difficult due to CTE mismatch

Engineering Contradiction:
Improvedevice densityVSAvoidwarpage control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by modifying the CTE of the stiffener member through material selection and geometric design. The stiffener's CTE is specifically tuned to compensate for the CTE mismatch between components, allowing warpage control in high-density assemblies with thin components without sacrificing device density

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The stiffener member is designed as a composite structure combining materials with different thermal expansion properties. This composite approach allows the stiffener to exhibit a tailored effective CTE that counteracts the warpage induced by CTE mismatch in the stacked semiconductor assembly

Inventive Principle:
Principle #40Composite materials

2Reliability

If elevated temperature processes are used for soldering, then reliable solder joints are formed, but warpage increases due to CTE mismatch

Engineering Contradiction:
Improvesolder joint reliabilityVSAvoidwarpage
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The stiffener member is designed to pre-counteract the warpage forces that will occur during elevated temperature soldering processes. By positioning the stiffener on the assembly before reflow, it creates a preliminary opposing stress that balances the thermal expansion mismatch, maintaining flatness during soldering while ensuring solder joint reliability

Inventive Principle:
Principle #9Preliminary anti-action

3Productivity

If different warpage values exist between semiconductor devices, then device stacking is possible, but connection difficulty increases

Engineering Contradiction:
Improvedevice stacking capabilityVSAvoidconnection ease
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The stiffener member is applied to one or more semiconductor devices in advance to adjust their warpage characteristics before stacking and connection operations. This preliminary warpage adjustment ensures that devices with initially different warpage values can be successfully stacked and connected without requiring complex post-adjustment processes

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The stiffener members effectively control warpage to within acceptable limits, reducing stress on components and enhancing solder joint reliability by matching or adjusting the CTE of the semiconductor device assembly, thereby improving the assembly's structural integrity and connectivity.

Implementation Method 1

The stiffener member may be configured to have a coefficient of thermal expansion that differs from the individual coefficients of thermal expansion of the substrate, the semiconductor device, and the mold compound

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11581231B2Stress tuned stiffeners for micro electronics package warpage control
Publication Date: 2023.02.14 MICRON TECHNOLOGY INC
  • US11581231B2 patent drawing
  • US11581231B2 patent drawing
  • US11581231B2 patent drawing

AI summary

A semiconductor device assembly including a substrate, a semiconductor device, a stiffener member, and mold compound. The stiffener member is tuned, or configured, to reduce and/or control the shape of warpage of the semiconductor device assembly at an elevated temperature. The stiffener member may be placed on the substrate, on the semiconductor device, and/or on the mold compound. A plurality of stiffener members may be used. The stiffener members may be positioned in a predetermined pattern on a component of the semiconductor device assembly. A stiffener member may be used so that the warpage of a first semiconductor device substantially corresponds to the warpage of a second semiconductor device at an elevated temperature. The stiffener member may be tuned by providing the member with a desired coefficient of thermal expansion (CTE). The desired CTE may be based on the individual CTEs of the components of a semiconductor device assembly.