Stimulus Space Clustering for Reduced IC Simulation Inputs

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Solution Overview

Problem

Current parallel graphics data processing systems face challenges in efficiently handling diverse operations on graphics data, such as linear interpolation, tessellation, and depth testing, particularly in systems with programmable and fixed function computational units.

Innovation Solution

The use of a general-purpose graphics processing unit (GPU) to perform data processing via clustering and stochastic processes, enabling efficient summarization of stimulus space by leveraging SIMT architectures and dedicated circuitry for processing commands.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fixed function computational units are used for graphics processing, then processing efficiency for specific operations is improved, but adaptability to diverse operations deteriorates

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidadaptability to diverse operations
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements a general-purpose graphics processing unit with programmable computational units that can execute diverse graphics operations (linear interpolation, tessellation, depth testing, etc.) through a unified architecture. This allows a single hardware design to handle multiple operation types, eliminating the need for separate fixed-function units for each operation while maintaining high processing efficiency through optimized execution engines.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If programmable computational units are implemented, then adaptability to diverse operations is improved, but processing efficiency for specific operations deteriorates

Engineering Contradiction:
Improveadaptability to diverse operationsVSAvoidprocessing efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the computational units into specialized execution engines (such as vertex execution units, fragment execution units, and geometry execution units) that can be independently configured. Each execution engine is optimized for specific operation types while remaining programmable, allowing the system to achieve high efficiency for particular operations by activating only the necessary specialized units rather than requiring all units to be fully programmable.

Inventive Principle:
Principle #1Segmentation

3Productivity

If pipelining is implemented to process graphics data in parallel, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidpipeline complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements nested pipelines where multiple execution pipelines are organized in a hierarchical structure. Execution units are nested within larger processing blocks, which are in turn nested within the overall graphics pipeline. This nested organization allows parallel processing to be achieved through systematic repetition of modular units, reducing overall complexity by breaking down the pipeline into manageable, self-similar components that can be independently configured and optimized.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS20250291987A1Summarizing stimulus space via clustering and stochastic processes
Publication Date: 2025.09.18 INTEL CORP
  • US20250291987A1 patent drawing
  • US20250291987A1 patent drawing
  • US20250291987A1 patent drawing

AI summary

An apparatus to facilitate summarizing stimulus space via clustering and stochastic processes is disclosed. The apparatus includes processing circuitry to: receive an original set of stimuli input data, the stimuli input data comprises variables for input to an electronic circuit simulator to check an integrity of integrated circuit designs and to predict integrated circuit behavior; apply a clustering algorithm to the original set to determine k subsets of the original set; define, for each subset of the k subsets, a random variable per subset in accordance with a distribution corresponding to the subset; compute inter-cluster transition probabilities between the k subsets; sample, in accordance with the inter-cluster transition probabilities, a reduced set of the stimuli input data from the k subsets of the original set; and utilize the reduced set as a smaller representative set of the stimuli input data for input to the electronic circuit simulator.