Self-Timed Logic Entropy Bit Stream Generator for Low-Power Random Number Generation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current networking applications face challenges in generating high-quality random numbers on network flow processor integrated circuits, which are crucial for encryption but lack efficient and power-effective solutions.

Innovation Solution

A network flow processor integrated circuit with a transactional memory that includes a self-timed logic entropy bit stream generator (STLEBSG), an entropy bit stream signal storage ring block, and a pseudo-random number generator (PRNG), which generates random numbers by state transitioning and stores entropy for later use, reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a random number generator continuously operates to generate random numbers for encryption, then the quality and availability of random numbers is improved, but power consumption increases

Engineering Contradiction:
Improverandom number generation availabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary action by capturing and storing entropy in the signal storage ring block before it is needed for random number generation. The entropy is captured during periods when power is available and stored for later use, allowing the generator to operate with reduced or zero power consumption during actual random number generation operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The random number generator operates periodically rather than continuously. The self-timed logic entropy bit stream generator activates at specific intervals to capture entropy, stores it in the signal storage ring, and then allows the pseudo-random number generator to produce random numbers from the stored entropy without continuous power consumption from the entropy generation circuitry.

Inventive Principle:
Principle #19Periodic action

2Use of energy by moving object

If the self-timed logic entropy bit stream generator is powered down to reduce power consumption, then power efficiency is improved, but the ability to generate new entropy is lost

Engineering Contradiction:
Improvepower consumptionVSAvoidentropy generation capability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system creates a copy of the entropy in the signal storage ring block, which can be circulated and used multiple times without requiring the original entropy generation process to remain active. The stored entropy copy maintains the non-deterministic properties needed for secure random number generation while allowing the power-intensive generation circuitry to be powered down.

Inventive Principle:
Principle #26Copying

3Productivity

If the signal storage ring block circulates stored entropy continuously, then random numbers can be generated without re-capturing entropy, but power consumption increases

Engineering Contradiction:
Improverandom number generation rateVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The signal storage ring block enables continuous circulation of the stored entropy signal, allowing the pseudo-random number generator to continuously produce random numbers from the stored entropy without requiring continuous operation of the entropy capture circuitry. The useful action of entropy utilization continues while the power-intensive generation phase is eliminated.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9164730B2Self-timed logic bit stream generator with command to run for a number of state transitions
Publication Date: 2015.10.20 NETRONOME SYSTEMS INC
  • US9164730B2 patent drawing
  • US9164730B2 patent drawing
  • US9164730B2 patent drawing

AI summary

A bit stream having non-deterministic entropy is generated by a Self-Timed Logic Entropy Bit Stream Generator (STLEBSG). The STLEBSG includes an incrementer and a linear feedback shift register (LFSR), both implemented in self-timed logic as parts of an asynchronous state machine. In response to a command, the incrementer asynchronously increments a number of times and then stops, where the number of times is determined by command. For each increment of the incrementer, the LFSR undergoes a state transition. As the incrementer increments, the LFSR outputs the bit stream. If the command is a run repeatedly command, then after the incrementer stops the incrementer is reinitialized and then again increments the number of times. This incrementing, stopping, reinitializing, and incrementing process is repeated indefinitely. Another command causes the incrementer to be loaded. Another command causes the LFSR to be loaded.