ST-MRAM ECC Write Scheme With Majority Bit Inversion
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Solution Overview
Problem
Spin-torque magnetoresistive random access memory (ST-MRAM) faces challenges with increasing variability in MTJ resistance and high switching current requirements, limiting scalability and requiring long switching times, while also needing to manage power consumption and error correction in high-bandwidth memory systems.
Innovation Solution
The implementation of a method and apparatus for reading and writing ST-MRAM that employs error correcting code (ECC) for reduced error rates, a majority detection and data state inversion scheme to minimize power consumption, and manages memory access delays through parity calculations and inversion of data and ECC bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If spin-torque switching is used to program MTJ devices, then write speed is improved, but switching current requirements increase
Solution Approach 1:
The patent applies preliminary action by performing majority detection and data inversion before the write operation. The system detects the majority state of data in a row and inverts data values beforehand, so that when writing occurs, fewer high-current pulses are needed. This preliminary preparation reduces the total switching current required while maintaining fast write speeds.
Solution Approach 2:
The patent changes the parameter of data representation by inverting data values (0 to 1, 1 to 0) based on majority detection. This parameter transformation allows the system to write data in a state that requires lower switching currents, effectively reducing energy consumption while preserving write speed performance.
2Quantity of substance
If MTJ dimensions are reduced to increase density, then storage density is improved, but variability in MTJ resistance increases
Solution Approach 1:
The patent implements feedback through majority detection, where the system reads the current state of data, detects the majority value, and uses this information to guide the write operation. This feedback mechanism compensates for resistance variability by adapting the write strategy based on the actual data state, ensuring reliable writing despite manufacturing variations in MTJ resistance.
Solution Approach 2:
The system performs self-service by automatically detecting data patterns and performing inversions without external intervention. The majority detection circuit autonomously identifies which data values are predominant and triggers appropriate inversion operations, enabling the system to self-correct for resistance variability effects.
3Speed
If write current pulse duration is reduced to increase speed, then write speed is improved, but switching current requirements increase
Solution Approach 1:
The patent performs preliminary action by detecting data states and performing inversions before the actual write pulse is applied. This pre-processing reduces the number of bits that require switching during the write operation, allowing for shorter pulse durations with lower current requirements while maintaining high write speed.
4Reliability
If error correcting code is implemented to reduce errors, then data integrity is improved, but memory access time increases
Solution Approach 1:
The patent applies partial action by implementing error correction only for the necessary portion of data. Rather than correcting all data uniformly, the system performs majority detection and applies inversion only where needed, reducing the overall correction overhead while maintaining data integrity for the critical majority of bits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces memory write operation time, minimizes power consumption, and enhances data integrity by efficiently managing write current pulses and error correction, thereby improving the scalability and performance of ST-MRAM systems.
Implementation Method 1
The angular momentum carried by the spin-polarized tunneling current causes reversal of the free layer
Implementation Method 2
spin-torque transfer is known to occur in MTJ devices and giant magnetoresistance devices
Data Source
AI summary
A method includes destructively reading bits of a spin torque magnetic random access memory, using error correcting code (ECC) for error correction, and storing inverted or non-inverted data in data-store latches. When a subsequent write operation changes the state of data-store latches, parity calculation and majority detection of the bits are initiated. A majority bit detection and potential inversion of write data minimizes the number of write current pulses. A subsequent write operation received within a specified time or before an original write operation is commenced will cause the majority detection operation to abort.