Stochastic Bitstream Generation for In-Situ Activation Mapping
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Solution Overview
Problem
The implementation of Analog-to-Digital Converters (ADC) and downstream digital circuits in analog AI chips leads to significant area and energy overhead, which is particularly problematic in resource-constrained environments.
Innovation Solution
Generate stochastic bitstreams by comparing multiple random analog voltage references against fixed input analog voltages, eliminating the need for conventional ADC architecture, and enabling in-situ non-linear activation function mapping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ADC and digital circuits are used for non-linear activation functions, then precision and flexibility are improved, but area and energy consumption increase significantly
Solution Approach 1:
The patent extracts the non-linear activation function computation from the conventional ADC-digital circuit path and implements it directly in the analog domain using modified crossbar array operations. This removes the need for separate ADC and digital processing circuits, significantly reducing on-chip area while maintaining computational precision through analog voltage operations that directly encode activation function transformations.
Solution Approach 2:
The patent merges the activation function computation with the matrix-vector multiplication operation in the analog crossbar array. By combining these functions into a single analog processing step, the system eliminates the need for separate ADC and digital computation circuits, reducing both area and energy consumption while maintaining the precision benefits of dedicated activation function processing.
2Adaptability or versatility
If conventional ADC and digital circuits are used for non-linear activation functions, then flexibility is improved, but energy consumption increases significantly
Solution Approach 1:
The patent extracts activation function computation from the energy-intensive ADC-digital circuit path and performs it natively in the analog domain using voltage operations in the crossbar array. This eliminates the high energy consumption of digital processing while maintaining flexibility through programmable weight configurations that can implement various activation functions.
Solution Approach 2:
The patent replaces the mechanical/electronic ADC-digital circuit system with an analog voltage-based computation system. By substituting digital conversion and processing with direct analog voltage operations, the system achieves comparable functional flexibility while dramatically reducing energy consumption associated with digital circuit operation.
3Measurement precision
If ADC is used to convert analog voltage to digital quantity, then precision is improved, but area overhead increases
Solution Approach 1:
The patent removes the ADC component entirely from the signal processing path by performing activation function computations directly in the analog domain. This extraction eliminates the area overhead of ADC circuitry while maintaining precision through analog voltage operations that naturally preserve measurement accuracy without requiring digital conversion.
Solution Approach 2:
The patent uses analog voltage copies and transformations to represent and process data through activation functions without converting to digital form. By working with analog voltage representations throughout the computation pipeline, the system achieves the precision benefits of accurate signal representation while avoiding the area cost of ADC hardware.
Data Source
AI summary
Techniques for generating digital outputs as stochastic bitstreams with activation function mapping are provided. In one aspect, a system includes: a shared circuitry component including a RNG for generating a sequence of random addresses to read a random sequence of digital voltage references stored in a LUT, and a DAC for converting the random sequence of digital voltage references into random analog voltage references VL; and a comparator(s) for comparing the random analog voltage references VL and input analog voltages VN in sequences of comparisons to produce sequences of digital pulses as stochastic bitstreams. A system having multiple comparators for simultaneously comparing each of the random analog voltage references VL against more than one of the input analog voltages VN in parallel is also provided, as is a method for generating digital outputs from input analog voltages VN.