Stochastic Computing Circuit Delays to Reduce Stream Correlation

Solution Overview

Problem

Stochastic computers using pseudo-random number generators face issues with repetition and correlation between outcome streams, leading to errors and increased power and space requirements due to the need for re-randomizers to mitigate these issues.

Innovation Solution

Implementing a circuitry with delay modules on communication links between processing nodes to introduce varying aggregate delays, ensuring no two paths impose the same delay, thereby reducing correlation and improving randomness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If re-randomizers are added to mitigate pseudo-random number repetition and correlation, then calculation accuracy is improved, but power consumption and floor-space increase

Engineering Contradiction:

Improvecalculation accuracyVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent extracts the delay functionality from separate re-randomizer components and integrates it directly into the communication links between processing nodes. By taking out the delay mechanism and embedding it in the existing communication infrastructure, the system achieves re-randomization without adding separate power-consuming components.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the delay function with the communication link structure. Instead of having separate re-randomizer modules, the delay is combined with the existing communication pathways, so that the same infrastructure serves both data transmission and randomization functions simultaneously.

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If re-randomizers are added to mitigate pseudo-random number repetition and correlation, then calculation accuracy is improved, but floor-space increases

Engineering Contradiction:

Improvecalculation accuracyVSAvoidfloor-space

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the delay functionality from separate re-randomizer components and integrates it directly into the communication links between processing nodes. By taking out the delay mechanism and embedding it in the existing communication infrastructure, the system achieves re-randomization without adding separate space-consuming components.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the delay function with the communication link structure. Instead of having separate re-randomizer modules, the delay is combined with the existing communication pathways, so that the same infrastructure serves both data transmission and randomization functions simultaneously.

Inventive Principle:

Principle #5Merging (Combining)

3Reliability

If multiple re-randomizers are deployed to handle simultaneous message traffic between hundreds of node pairs, then correlation between outcome streams is reduced, but device complexity increases

Engineering Contradiction:

Improveindependence of outcome streamsVSAvoidnumber of re-randomizers

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent makes the communication links universal by embedding delay functionality directly in them. The same communication infrastructure serves multiple purposes: data transmission and randomization. This eliminates the need for dedicated re-randomizer components for each node pair, reducing overall system complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the delay function with the communication link structure. Instead of having separate re-randomizer modules, the delay is combined with the existing communication pathways, so that the same infrastructure serves both data transmission and randomization functions simultaneously.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS9047153B2Selective delay of data receipt in stochastic computation

Publication Date: 2015.06.02 ANALOG DEVICES INC

AI summary

Circuitry for stochastic computation includes processing nodes, including a first processing node and a second processing node, each configured to process an outcome stream having a plurality of outcomes, each outcome being in one of a plurality of states, wherein an outcome from said outcome stream is in a particular state with a particular probability; communication links configured to transmit outcome streams between pairs of said processing nodes; and a delay module on each of said communication links, said delay module configured to delay outcome streams traversing said communication link by an assigned delay; wherein said first and second processing nodes are connected by a plurality of data paths, at least one of which comprises a plurality of communication links, each of said data paths causing an aggregate delay to an outcome stream traversing said data path; wherein no two aggregate delays impose the same delay on an outcome stream.