Stochastic Computing Accelerator for CNNs

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Solution Overview

Problem

Convolutional neural networks (CNNs) face challenges in embedded devices due to limited computational resources and inadequate power budgets, with stochastic computing (SC) offering lower power consumption and tolerance to soft errors but struggling with low accuracy and long computation time.

Innovation Solution

The proposed architecture employs a differential Multiply-and-Accumulate unit (DMAC) to reduce computation time by skipping unnecessary bitwise ANDs and sorting weights to minimize differences between successive weights, resulting in a novel SC accelerator that reduces area and power consumption while preserving accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If stochastic computing is used for CNN acceleration, then power consumption is reduced, but computation time increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcomputation time
Core Design Contradiction:
Use of energy by stationary objectVSProductivity

Solution Approach 1:

The patent segments the weight values into multiple bit-streams, where each bit-stream represents a portion of the weight. This allows parallel processing of different weight components, reducing the overall computation time while maintaining the low power consumption benefits of stochastic computing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary processing by converting weights into segmented bit-stream representations before the main convolution operation. This pre-processing enables more efficient computation during the actual inference phase, reducing computation time without increasing power consumption.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If stochastic computing is used for CNN acceleration, then hardware area is reduced, but computation time increases

Engineering Contradiction:
Improvehardware areaVSAvoidcomputation time
Core Design Contradiction:
Area of stationary objectVSProductivity

Solution Approach 1:

The patent divides weight values into multiple segments represented as separate bit-streams. This segmentation enables parallel computation paths that can be implemented with simpler, smaller hardware units, reducing the overall hardware area while the parallelism compensates for the inherent slowness of stochastic operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from processing weights in the traditional numerical domain to the stochastic bit-stream domain, adding a temporal dimension to the computation. Multiple bit-streams are processed in parallel over time, effectively using time-division multiplexing to achieve the desired computational throughput with reduced hardware area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If stochastic computing is used for CNN acceleration, then tolerance to soft errors is improved, but accuracy deteriorates

Engineering Contradiction:
Improvetolerance to soft errorsVSAvoidaccuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent changes the representation parameter of weights from fixed-point or floating-point numbers to segmented stochastic bit-streams. This parameter change enables the system to leverage the inherent noise-tolerance of stochastic computing while the segmentation strategy maintains numerical precision by distributing the representation across multiple independent bit-streams.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite approach by combining multiple bit-streams to represent a single weight value. This composite representation maintains accuracy through the collective information in multiple streams while benefiting from the error-tolerance of individual stochastic operations, as errors in one stream have limited impact on the overall result.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20210256357A1Embedded stochastic-computing accelerator architecture and method for convolutional neural networks
Publication Date: 2021.08.19 UNIVERSITY OF LOUISIANA AT LAFAYETTE
  • US20210256357A1 patent drawing
  • US20210256357A1 patent drawing
  • US20210256357A1 patent drawing

AI summary

The disclosed invention provides a novel architecture that reduces the computation time of stochastic computing-based multiplications in the convolutional layers of convolutional neural networks (CNNs). Each convolution in a CNN is composed of numerous multiplications where each input value is multiplied by a weight vector. Subsequent multiplications are performed by multiplying the input and differences of the successive weights. Leveraging this property, disclosed is a differential Multiply-and-Accumulate unit to reduce the time consumed by convolutions in the architecture. The disclosed architecture offers 1.2× increase in speed and 2.7× increase in energy efficiency compared to known convolutional neural networks.