Stochastic Decoder Noise Dependent Scaling Edge Memory
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Solution Overview
Problem
Stochastic decoding is sensitive to switching activity levels, leading to 'latching' issues where nodes become locked into one state due to rare switching events, which hampers proper decoding operations.
Innovation Solution
The implementation of Noise Dependent Scaling (NDS) and Edge Memories (EMs) to re-randomize and de-correlate stochastic signal data streams, using pseudo-random and random number generation to determine output symbols and scaling factors based on noise levels and decoding characteristics, thereby improving iterative decoding processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If stochastic decoding is used to simplify circuitry and reduce complexity, then device complexity is reduced, but reliability deteriorates due to sensitivity to switching activity levels and latching issues
Solution Approach 1:
A switching activity monitoring unit is introduced as an intermediary component that observes the stochastic signal data stream and generates control signals based on detected switching activity levels. This mediator enables the system to adaptively adjust decoding parameters without fundamentally changing the stochastic decoding architecture, thus maintaining low complexity while improving reliability.
Solution Approach 2:
The decoder transitions from a static configuration to a dynamic one where decoding parameters (such as threshold levels or iteration counts) are adjusted in real-time based on monitored switching activity. This dynamic adaptation allows the system to respond to varying signal conditions, preventing latching issues while preserving the simplicity of stochastic decoding.
2Ease of operation
If stochastic computation is used to represent probabilities as bit streams, then ease of operation is improved through simple circuitry, but manufacturing precision deteriorates due to sensitivity to switching activity
Solution Approach 1:
A feedback mechanism is implemented where the switching activity monitoring unit continuously observes the stochastic bit stream and feeds back control signals to adjust decoding parameters. This feedback loop compensates for variations in switching activity caused by manufacturing tolerances, thereby maintaining decoding accuracy despite the simplicity of the stochastic circuitry.
3Reliability
If Noise Dependent Scaling and Edge Memories are implemented to re-randomize data streams, then reliability is improved by reducing latching issues, but device complexity increases
Solution Approach 1:
Instead of implementing full Noise Dependent Scaling and Edge Memories for all data streams, the patent applies re-randomization selectively based on monitored switching activity levels. When switching activity falls below a threshold, re-randomization is activated only for affected portions of the data stream, achieving reliability improvement with minimal additional complexity.
Data Source
AI summary
A method for iteratively decoding a set of encoded samples received from a transmission channel is provided. A data signal indicative of a noise level of the transmission channel is received. A scaling factor is then determined in dependence upon the data signal and the encoded samples are scaled using the scaling factor. The scaled encoded samples are then iteratively decoded. Furthermore, a method for initializing edge memories is provided. During an initialization phase initialization symbols are received from a node of a logic circuitry and stored in a respective edge memory. The initialization phase is terminated when the received symbols occupy a predetermined portion of the edge memory. An iterative process is executed using the logic circuitry storing output symbols received from the node in the edge memory and a symbol is retrieved from the edge memory and provided as output symbol of the node. Yet further an architecture for a high degree variable node is provided. A plurality of sub nodes forms a variable node for performing an equality function in an iterative decoding process. Internal memory is interposed between the sub nodes such that the internal memory is connected to an output port of a respective sub node and to an input port of a following sub node, the internal memory for providing a chosen symbol if a respective sub node is in a hold state, and wherein at least two sub nodes share a same internal memory.