Stochastic TDC Voltage Selection for Ultrafine Linear Phase Detection
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Solution Overview
Problem
Designing a time-to-digital converter (TDC) with ultrafine resolution and linearity is challenging due to component mismatches in semiconductor processes, which lead to non-linearity issues in stochastic TDCs.
Innovation Solution
A stochastic TDC is developed with multiple arbiter cells that compare input and reference signals based on selection signals, utilizing time offsets to calculate phase differences, and a binary converter to minimize integral non-linearity errors, allowing for improved linearity and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If component size is decreased to increase signal speed, then signal processing capability is improved, but component mismatch increases leading to non-linearity in TDC
Solution Approach 1:
The patent applies parameter changes by utilizing voltage selection to alter the operating characteristics of arbiter cells. By switching between different voltages, the system can adjust time offsets and compensate for component mismatches, thereby maintaining linearity despite manufacturing variations in miniaturized components.
Solution Approach 2:
The patent implements feedback mechanisms through the selection signal determination process. The system determines selection signals based on process corner characteristics and minimizes integral non-linearity error through feedback adjustment, allowing the TDC to adapt to component variations and maintain accuracy in high-speed operation.
2Measurement precision
If multiple arbiter cells with different time offsets are used to achieve ultrafine resolution, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the TDC into multiple arbiter cells, each with specific time offset characteristics. This segmentation allows the system to achieve ultrafine resolution by combining measurements from multiple cells while managing complexity through structured organization of the arbiter cell array.
Solution Approach 2:
The patent implements universality by designing arbiter cells that can operate with different voltage levels and time offsets. Each arbiter cell serves multiple functions by adapting its operation based on selection signals, reducing the need for entirely separate circuitry for different measurement ranges and thereby managing device complexity.
3Manufacturing precision
If selection signals are optimized to minimize integral non-linearity error, then linearity is improved, but control complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-determining selection signals based on process corner characteristics before actual operation. This advance preparation minimizes integral non-linearity error by accounting for manufacturing variations upfront, reducing the need for complex real-time adjustments during operation.
Data Source
AI summary
Disclosed is a stochastic time-to-digital converter, which includes a first arbiter cell that compares a timing of a reference signal and a timing of an input signal based on a voltage selected by a first selection signal from among a first voltage or a second voltage and outputs a first comparison result, a second arbiter cell that compares the timing of the reference signal with the timing of the input signal based on a voltage selected by a second selection signal from among the first voltage or the second voltage and outputs a second comparison result, and a binary converter that calculates a phase difference between the reference signal and the input signal based on the first comparison result and the second comparison result.