Storage Hardware Accelerator for In-Device Data Processing

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Solution Overview

Problem

Existing storage devices lack efficient data processing capabilities, leading to increased data transfer demands between flash memory and computer systems, which can be addressed by incorporating hardware accelerators to offload traditional processes and improve data access times.

Innovation Solution

Incorporating hardware accelerators such as GPU, FPGA, or NPU into storage devices to perform data indexing, encryption, decryption, compression, and machine learning tasks, reducing the need for extensive data transfer by selectively managing and processing data within the storage device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data processing is performed by the computer system CPU, then the storage device can use simpler hardware, but data transfer demands increase and processing efficiency decreases

Engineering Contradiction:
Improvedata processing efficiencyVSAvoiddata transfer volume
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent extracts data processing functions (indexing, encryption, compression, machine learning) from the computer system CPU and relocates them to dedicated hardware accelerator units within the storage device. This extraction reduces the data transfer volume between storage and computer while improving processing efficiency, as the accelerators can process data locally without requiring constant data movement to the host system.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The hardware accelerator units act as intermediaries between the flash memory and the computer system. Instead of direct communication requiring full data transfer, the accelerators intermediate the data flow by performing processing operations locally, thereby reducing the quantity of data that must be transferred while maintaining high productivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If hardware accelerators are added to storage devices, then data access times improve and processing workload reduces, but device complexity increases

Engineering Contradiction:
Improvedata access timeVSAvoidstorage device structure
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent segments the storage device into distinct functional units: flash memory, storage controller, and specialized hardware accelerators (indexing accelerator, encryption accelerator, compression accelerator, machine learning accelerator). Each segment handles specific tasks, improving data access time through parallel processing while managing complexity through modular design where each component has a dedicated function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The hardware accelerators are designed with multi-functionality to handle various data processing tasks. For example, the storage controller manages multiple operations including data transfer, error correction, and coordination with different types of accelerators. This universality reduces overall device complexity by using versatile components rather than dedicated hardware for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12585598B2Storage device with hardware accelerator
Publication Date: 2026.03.24 SONY INTERACTIVE ENTERTAINMENT LLC
  • US12585598B2 patent drawing
  • US12585598B2 patent drawing
  • US12585598B2 patent drawing

AI summary

A storage device includes a storage controller, a Flash Memory and a hardware accelerator communicatively coupled. The hardware accelerator is configured to selectively retrieve data stored in the flash memory in response to a request for the data and may perform other operation to accelerate data access for a computer system.