Storage Accelerator Memory Split for Faster Compressed Data Reads
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Solution Overview
Problem
Current storage devices face performance bottlenecks when increasing data compression units due to memory bandwidth limitations, which hinder the improvement of data read performance despite advances in transmission technology.
Innovation Solution
A storage device configuration with a separate accelerator having a second memory that decompresses data and transmits it to a first memory, reducing the load on the CPU and minimizing memory bandwidth bottlenecks by using a programmable FPGA or ASIC to manage data compression and decompression processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of substance
If the data compression unit is increased to improve data reduction rate, then the data reduction rate is improved, but the memory bandwidth of the CPU becomes a bottleneck in reading data
Solution Approach 1:
The patent divides the data processing system into two independent parts: the CPU with first memory for control functions, and the accelerator with second memory for compression/decompression functions. This segmentation allows the accelerator to handle large compression units independently without burdening the CPU memory bandwidth, thus maintaining high data reduction rates while avoiding CPU memory bottlenecks in data read operations.
Solution Approach 2:
The accelerator acts as an intermediary between the storage medium and the CPU. It performs compression and decompression operations independently using its own memory, serving as a mediator that prevents large data transfers from bottlenecking the CPU memory bandwidth while still achieving high data reduction rates through large compression units.
2Loss of substance
If compression and decompression processes are executed by the CPU, then the data amount is reduced, but the performance of writing and reading data deteriorates
Solution Approach 1:
The patent extracts the compression and decompression functions from the CPU and places them in a separate accelerator. This extraction removes the heavy computational load of compression/decompression from the CPU, allowing the CPU to focus on control functions and data management, thereby improving overall data writing and reading performance while maintaining data amount reduction.
Solution Approach 2:
The system is segmented into CPU (for control) and accelerator (for compression/decompression). This segmentation allows parallel operation where the accelerator handles intensive compression/decompression tasks independently using its own memory, preventing these processes from deteriorating CPU-based data writing and reading performance.
3Loss of substance
If the compression unit is increased to 64 kB or more, then the data reduction rate is improved, but the amount of data to be read and written from the memory becomes extremely larger than the amount of data to be output
Solution Approach 1:
The patent segments the memory system into first memory (CPU) and second memory (accelerator). When handling large compression units like 64 kB, the accelerator uses its own second memory for intermediate storage, preventing excessive data from being transferred through the CPU's first memory. This segmentation allows high data reduction rates through large compression units without overwhelming the CPU memory with excessive data transmission.
Solution Approach 2:
The accelerator with its own memory serves as an intermediary that handles large compression unit processing independently. It reads compressed data from the storage medium, decompresses it in its own memory, and then transfers only the necessary extracted data to the CPU's first memory, thereby preventing the CPU memory from being overwhelmed by excessively large data amounts during large unit compression operations.
Data Source
AI summary
The storage device includes a first memory, a process device that stores data in the first memory and reads the data from the first memory, and an accelerator that includes a second memory different from the first memory. The accelerator stores compressed data stored in one or more storage drives storing data, in the second memory, decompresses the compressed data stored in the second memory to generate plaintext data, extracts data designated in the process device from the plaintext data, and transmits the extracted designated data to the first memory.