Data Storage Array Defect Detection and Restoration
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Solution Overview
Problem
Existing methods for in-field detection and repair of data storage array defects are inefficient, as they require external testers, increase chip area, and cannot detect defects caused by temperature variations and voltage fluctuations during operation, limiting the ability to identify and fix issues in real-time.
Innovation Solution
A system comprising a data storage array with integrated parity generator, parity checker, BIST generator, and restoration mechanism that computes and stores parity check data during write operations, verifies it during read operations, and applies BIST only on identified defective elements to determine and restore defective storage elements without affecting other data, reducing time and area overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If BIST is applied to the entire data storage array, then all defective elements can be identified, but testing time increases significantly
Solution Approach 1:
The patent divides the data storage array into multiple banks and applies BIST to only those banks that contain defective elements, rather than testing the entire array. This segmentation allows parallel processing of different banks and reduces the total testing time while maintaining complete defect detection coverage across all banks.
2Measurement precision
If external testers and interface circuitry are used for test and repair, then defect detection capability is improved, but chip area increases
Solution Approach 1:
The patent implements a self-service testing mechanism where the data storage array uses its own internal BIST circuitry and redundancy resources to detect and repair defective elements without requiring external testers. The array performs self-diagnosis and self-repair using built-in spare rows and columns, eliminating the need for external testing equipment and reducing chip area requirements.
3Reliability
If redundancy resources are increased to handle more defective elements, then repair capability is improved, but chip area increases
Solution Approach 1:
The patent implements dynamic allocation of redundancy resources where spare rows and columns are selectively activated only when defective elements are detected in corresponding banks. The redundancy mechanism dynamically configures replacement paths based on the actual defect locations, allowing the system to handle variable numbers of defects without permanently allocating excess redundancy resources that would increase chip area.
Data Source
AI summary
The system and method are for efficient detection and restoration of data storage array defects. The system may include a data storage subsystem, wherein the data storage subsystem includes a data storage array, read-write logic coupled to the data storage array, a parity generator for producing and storing check data during write operations to the data storage array and generating check data during read operations on the data storage array, and a parity checker for verifying the stored check data with generated check data and identifying defective data read-write elements during read operations on the data storage array. The subsystem may further include a Built-in Self Test (BIST) generator operating only on the identified defective data read-write elements for determining defective data storage elements in the defective data read-write elements, and a restoration mechanism for restoring the valid operation of data access elements containing the defective data storage elements in the data storage array.