Storage Device Bus Clock Frequency Control
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Solution Overview
Problem
Existing data transmission techniques in inkjet printing systems face reliability issues due to contact failures in electric connections and high current consumption, leading to potential faults and heating or noise problems, with insufficient consideration given to reducing current consumption during data transmission between control devices and storage devices.
Innovation Solution
A system where storage devices are connected to a controller via a bus with a lower clock frequency during identification information transmission and a higher frequency during data transmission, allowing for reduced current consumption and high-speed data transfer by setting non-connected devices to a high impedance state, thereby minimizing current usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock frequency is excessively increased to make data transmission more rapid, then data transmission speed is improved, but consumed current flowing in data line is excessively increased
Solution Approach 1:
The patent applies dynamics by making the clock frequency adjustable rather than fixed. The control device dynamically changes the clock frequency based on the transmission phase: using a first (lower) frequency during identification information transmission and a second (higher) frequency during data transmission. This dynamic adjustment resolves the contradiction by allowing high speed only when necessary (data transmission phase) while reducing current consumption during identification phase.
Solution Approach 2:
The patent changes the parameter of clock frequency according to different transmission phases. By switching between a first clock frequency (lower) for identification information and a second clock frequency (higher) for data transmission, the system optimizes both speed and energy consumption. This parameter change strategy allows the system to achieve rapid data transmission when needed while minimizing current consumption during other phases.
2Productivity
If the clock frequency is increased to improve data transmission speed, then productivity is improved, but heating and noise problems occur due to excessive current consumption
Solution Approach 1:
The patent implements periodic action by dividing data transmission into distinct phases with different clock frequencies. During the identification information transmission phase, a lower clock frequency is used, and during the data transmission phase, a higher clock frequency is applied. This periodic switching between frequency levels allows the system to achieve high productivity during data transmission while minimizing heating and noise during the identification phase, thus resolving the harmful effects.
3Reliability
If communication reliability is improved by using robust error correction, then reliability is improved, but device complexity is increased
Solution Approach 1:
The patent applies preliminary action by transmitting identification information before actual data transmission. This preliminary identification phase allows the control device to determine which storage device should receive data, enabling selective communication. By establishing the communication target in advance through identification transmission, the system achieves reliable communication without requiring complex error correction mechanisms for all devices, thus reducing overall circuit complexity while maintaining reliability.
Data Source
AI summary
A system includes a plurality of storage devices and a controller. The plurality of storage devices are bus-connected to one clock signal line and one data signal line connected to the controller. Each of the plurality of storage devices stores identification information in advance to distinguish the storage devices from each other. The controller transmits data using an identification information transmission period in which one storage device is selected from the plurality of storage devices by transmitting the identification information of the one storage device to the plurality of storage devices via the data signal line and a data transmission period in which the data is transmitted to the one selected storage device. A frequency of a clock signal during the identification information transmission period is set to be lower than a frequency of the clock signal during the data transmission period.