Redundant Cache Memory Layout for Storage Controller Failover

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Solution Overview

Problem

Existing storage apparatuses with redundant control devices face degradation in availability and performance due to power saving modes or blocking of control devices, leading to impaired redundancy and reduced data reliability and availability.

Innovation Solution

The storage apparatus is configured with two control devices and three memories, where dirty data is redundantly stored across these memories, allowing seamless data I/O processing even when one memory or control device is stopped, maintaining performance and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a redundant control device configuration is used to ensure reliability, then data availability is improved, but device complexity increases

Engineering Contradiction:
Improvedata availabilityVSAvoidcontrol device configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The storage system is segmented into two independent control devices (first and second control devices), each capable of independently managing data I/O operations. This segmentation allows the system to maintain reliability through redundancy while keeping each control device's internal complexity manageable, as each device handles a portion of the overall control functions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Three memories (first, second, and third memories) are merged into a unified storage resource pool that is accessible by both control devices. This merging allows the memories to function as a shared resource, improving data availability through redundancy while avoiding the complexity of completely separate memory systems for each control device.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If dirty data is redundantly stored in multiple memories, then data reliability is improved, but memory resource consumption increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidmemory resource consumption
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Different types of data are stored with different redundancy levels in different memories. Clean data is stored in first and second memories with standard redundancy, while dirty data (data awaiting write completion) is specifically stored in the third memory with enhanced redundancy. This local differentiation optimizes memory resource consumption by applying redundancy only where it is most critical for data integrity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system performs preliminary actions by maintaining dirty data in the third memory before it is fully written to persistent storage. This preliminary staging area allows the system to prepare data for writing while maintaining redundancy, ensuring that even if one memory fails, the dirty data can be recovered and written without data loss.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If one control device is blocked or enters power saving mode, then energy consumption is reduced, but availability is degraded

Engineering Contradiction:
Improvecontrol device energy consumptionVSAvoidsystem availability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The third memory acts as an intermediary that maintains dirty data independently of the control devices' operational state. When one control device is blocked or in power saving mode, the other control device can still access the third memory to retrieve dirty data and maintain data I/O operations, ensuring system availability is not degraded by the energy-saving state of one device.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically changes operational parameters by allowing control devices to transition between active and power-saving states based on workload conditions. The memory redundancy configuration ensures that data availability is maintained across these parameter changes, as the third memory preserves dirty data even when control devices change their operational state.

Inventive Principle:
Principle #35Parameter changes

4Productivity

If direct writing to storage drive is performed when control device is blocked, then performance degradation is avoided, but data reliability is compromised

Engineering Contradiction:
Improvestorage apparatus performanceVSAvoiddata redundancy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The third memory serves as a preliminary buffer that stores dirty data before it is written to the storage drive. When one control device is blocked, the other control device can continue to write data to the third memory, maintaining the data I/O path and performance. The redundancy in the third memory ensures data reliability is preserved even during these transitional states.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The third memory acts as an intermediary between the control devices and the storage drive, particularly when one control device is blocked. This intermediary maintains the data path by storing dirty data in a redundant manner, allowing the system to maintain performance through continued I/O operations while preserving data reliability through the redundant storage architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12511235B2Storage apparatus and control method for storage apparatus
Publication Date: 2025.12.30 HITACHI VANTARA LTD
  • US12511235B2 patent drawing
  • US12511235B2 patent drawing
  • US12511235B2 patent drawing

AI summary

A storage apparatus includes a first control device having a first memory, a second control device having a second memory, and a memory module having a third memory. The first memory and the second memory store drive control information including association between a logical address and a physical address, cache data in data I/O processing, and cache control information including association between a logical address of the cache data and a cache address of the cache data. The third memory stores the drive control information, dirty data of the cache data in the first memory, dirty data of the cache data in the second memory, and the cache control information. Even in a case where the control device or the memory module is blocked, the dirty data is set to be redundantly stored in each of different apparatuses.