Storage Cache Partitioning for Sparse Read Locality

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Solution Overview

Problem

Storage devices with non-volatile memory having a coarse read granularity waste bandwidth due to low data locality, necessitating inefficient caching at a finer host interface granularity.

Innovation Solution

Implementing a cache system in the storage device that separates data into two portions, one for less sparse and one for sparse data, using caching hints and a history table to efficiently store and evict data units based on address patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If data is read from non-volatile memory with coarse read granularity, then data can be retrieved from storage, but bandwidth is wasted due to low data locality

Engineering Contradiction:
Improvebandwidth usageVSAvoiddata retrieval efficiency
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The cache is divided into two distinct portions: a first portion that stores data units using a first caching scheme (for less sparse data) and a second portion that stores data units using a second caching scheme (for sparse data). This segmentation allows the system to optimize bandwidth usage for different data access patterns separately, reducing overall bandwidth waste while maintaining retrieval efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically selects between different caching schemes based on data locality characteristics. The controller determines whether to store data in the first or second portion of the cache based on real-time assessment of data access patterns, enabling adaptive optimization of bandwidth usage and retrieval efficiency without manual intervention.

Inventive Principle:
Principle #15Dynamics

2Reliability

If caching is implemented at finer host interface granularity, then data locality improves, but cache utilization becomes inefficient

Engineering Contradiction:
Improvedata localityVSAvoidcache utilization efficiency
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different regions of the cache (first portion and second portion) are assigned different caching schemes tailored to their specific data characteristics. The first portion handles less sparse data with one approach while the second portion handles sparse data with another, optimizing cache utilization for each local context rather than applying a uniform strategy across the entire cache.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes caching parameters (which caching scheme to apply) based on the data locality characteristics of the stored data units. By adjusting the caching approach according to the specific parameters of the data being accessed, the system improves data locality while maintaining efficient cache utilization without excessive complexity.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If selective caching based on caching hints is implemented, then cache utilization enhances, but system complexity increases

Engineering Contradiction:
Improvecache utilizationVSAvoidcaching control logic
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system receives caching hints from the host before data is actually accessed, allowing it to pre-determine which caching scheme to apply and where to store data units in the cache. This preliminary action enables the controller to optimize cache utilization in advance, reducing the need for complex real-time decision-making logic during data access operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260010482A1System and method for caching in a storage device
Publication Date: 2026.01.08 SAMSUNG ELECTRONICS CO LTD
  • US20260010482A1 patent drawing
  • US20260010482A1 patent drawing
  • US20260010482A1 patent drawing

AI summary

A system and method for caching in a storage device. In some embodiments, a storage device includes: a control circuit; non-volatile memory; and a cache. The control circuit may be configured: to receive, from a host, a caching hint identifying a first address; to read a first quantity of data from the non-volatile memory; and to store a portion of the first quantity of data in the cache, the first quantity being larger than the portion, the portion including a first data unit, having an address equal to the first address.