Storage System Channel Control Using Multiple Processors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional storage systems have inefficiencies in processor utilization and processing capacity due to the limited functionality of protocol processors, which hinders the effective scaling and performance of highly scalable storage systems.
Innovation Solution
A storage system architecture that includes multiple protocol processors connected via a channel, with a local router determining which processors handle frame processing based on access requests, allowing for efficient distribution and management of processing tasks across multiple processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a single large-scale storage system replaces multiple storage systems, then management is facilitated, but the system requires higher performance and processing capacity
Solution Approach 1:
The storage system is segmented into multiple protocol processors, each capable of independently handling channel protocols. This segmentation allows the system to maintain ease of management as a unified system while achieving high processing capacity through parallel operation of multiple processors
Solution Approach 2:
Multiple protocol processors are provided, each capable of performing the same channel protocol processing functions. This multi-functionality enables the system to handle increased processing demands while maintaining uniform management approaches across all processors
2Productivity
If multiple processors are provided in a highly scalable storage system, then processing capacity is increased, but not all processors are efficiently utilized
Solution Approach 1:
A frame distribution management unit is introduced that dynamically monitors and manages the distribution of frames to protocol processors. This feedback mechanism ensures that incoming frames are efficiently allocated to available processors, maximizing processor utilization while maintaining high processing capacity
Solution Approach 2:
The frame distribution management unit acts as an intermediary between the channel interface and multiple protocol processors. It receives incoming frames and intelligently distributes them to appropriate processors, ensuring efficient utilization of all processors while maintaining high overall processing capacity
3Device complexity
If the protocol processor provides limited processing functions, then device complexity is reduced, but processing efficiency is hindered
Solution Approach 1:
The processing functions are segmented between protocol processors (handling channel protocol conversion) and general-purpose processors (handling storage system control). This segmentation allows protocol processors to remain relatively simple while the system as a whole achieves high processing efficiency through distributed processing
Solution Approach 2:
The system employs multiple types of processors with different specialized functions - protocol processors for channel protocol handling and general-purpose processors for storage control. This multi-functionality approach enables each processor type to be optimized for its specific role while contributing to overall system efficiency
Data Source
AI summary
Storage system: wherein processor number information includes at least one logical unit number and at least one processor number of storage nodes; wherein transfer list index/processor number information includes a processor number for identifying a processor from among processors of the plurality of storage nodes, and index information for identifying a transfer list including instruction which the processor sends to the protocol processor; wherein a local router determines a first processor from among the processors of the plurality of storage nodes which is to be a transfer destination of a write request based on processor number information in response to the write request from the host computer through the protocol processor; wherein the first processor generates and sends to the protocol processor a first transfer list which includes instruction for processing, and generates first index information which is an index of the first transfer list upon receiving the write request.


