Storage Channel ECC Layout for Dual Memory Device Error Correction
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Solution Overview
Problem
Existing DDR memory systems face issues with uncorrectable errors due to environmental interference, leading to data loss and system downtime, especially when two memory devices fail simultaneously, as current error correction methods are inadequate for such scenarios.
Innovation Solution
A data processing method and apparatus that utilizes a Vandermonde-like matrix for encoding and decoding to simultaneously correct errors in two symbols by organizing burst data from multiple storage channels into error correcting codewords, enabling simultaneous correction of errors in two memory devices without relying on historical records or software intervention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional ECC error correction is used, then single-bit errors can be corrected, but simultaneous errors in two memory devices cannot be corrected leading to data loss
Solution Approach 1:
The patent combines data from two separate storage channels into a unified error correcting codeword structure. By merging the data symbols and check symbols from both channels, the system creates a redundant coding structure that enables correction of simultaneous errors in either channel, transforming the limitation of single-channel ECC into a multi-channel error correction capability
Solution Approach 2:
The patent changes the parameters of the error correcting code by using a Vandermonde-like matrix with specific mathematical properties. This matrix structure allows the decoding process to solve for error locations and values simultaneously across two memory devices, changing the fundamental parameters of what can be corrected from single-bit to dual-symbol errors
2Reliability
If uncorrectable errors are reported for dual errors, then system integrity is maintained, but system downtime occurs due to memory replacement
Solution Approach 1:
The patent performs preliminary error correction by decoding and correcting errors in the read-back data before the data is used by the processor. The error correcting codeword structure and Vandermonde-like matrix enable the system to proactively identify and correct dual errors, preventing the need for subsequent memory replacement and system downtime
Solution Approach 2:
The error correction system serves itself by automatically detecting and correcting simultaneous errors in two memory devices without requiring external intervention. The mathematical structure of the coding scheme enables the system to self-diagnose error locations and self-correct the data, eliminating the need for manual memory replacement
3Reliability
If more check symbols are added to correct dual errors, then error correction capability improves, but memory bandwidth and storage efficiency decrease
Solution Approach 1:
The check symbols in the error correcting codeword serve multiple functions simultaneously: they provide error detection capability, error location identification, and error value calculation. The Vandermonde-like matrix structure enables these check symbols to correct errors in either of the two storage channels, making the check symbols universally applicable to multiple error scenarios without requiring additional check symbols for each channel
Solution Approach 2:
The patent uses a partial coding approach where not all possible error patterns are corrected with equal redundancy. Instead, the coding scheme is designed to correct the specific case of simultaneous errors in two symbols across two channels, using just enough check symbols to achieve this targeted correction capability without the excessive redundancy that would be required for more general error correction scenarios
Data Source
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AI summary
The disclosure provides a data processing method and apparatus, and a storage system. The data processing method comprises reading two sets of burst data from a first storage channel and reading two sets of burst data from a second storage channel to obtain four sets of burst data, the four sets of burst data correspond to encoded data stored in the first storage channel and the second storage channel, the encoded data is obtained by encoding k data symbols that are written into the first storage channel and the second storage channel, and the encoded data comprises the k data symbols and m check symbols, a total bit width of the m check symbols is eight times a bit width of one error correcting symbol; organizing the four sets of burst data into a group of error correcting codewords, the group of error correcting codewords comprises k read-back data symbols and m read-back check symbols; and performing a decoding operation based on the group of error correcting codewords to obtain an error-corrected symbol. The data processing method can implement the simultaneous error correction of two symbols.