Storage Circuit Random Number Generation Mode
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Solution Overview
Problem
Existing data processing systems lack a cost-effective and efficient method to generate pseudo random bit values, which are essential for security applications, as they require additional resources and complex circuits.
Innovation Solution
A storage circuit with a dual mode operation: a normal mode for receiving and storing external bit values and a random number generation mode, where the circuit oscillates to produce a pseudo random bit value, utilizing an inverter chain and multiplexer to switch between modes with minimal additional resource usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dedicated pseudo random number generator circuit is used, then pseudo random bit values can be generated, but the device complexity and resource usage increase
Solution Approach 1:
The storage circuit is designed to perform multiple functions: it can operate in normal mode to store external bit values and in random number generation mode to generate pseudo random bit values. By making the storage circuit universal, the patent eliminates the need for separate dedicated random number generator circuits, thereby reducing device complexity while maintaining the capability to generate pseudo random bit values.
Solution Approach 2:
The patent combines the random number generation functionality with the existing storage circuit by adding a feedback path that creates an oscillating condition. This merging of functions allows the storage circuit to generate pseudo random bit values without requiring additional dedicated circuitry, thus reducing overall device complexity.
2Reliability
If a dedicated pseudo random number generator circuit is used, then pseudo random bit values can be generated, but the resource overhead increases
Solution Approach 1:
The storage circuit is designed to perform multiple functions: it can operate in normal mode to store external bit values and in random number generation mode to generate pseudo random bit values. By making the storage circuit universal, the patent eliminates the need for separate dedicated random number generator circuits, thereby reducing device complexity while maintaining the capability to generate pseudo random bit values.
Solution Approach 2:
The patent combines the random number generation functionality with the existing storage circuit by adding a feedback path that creates an oscillating condition. This merging of functions allows the storage circuit to generate pseudo random bit values without requiring additional dedicated circuitry, thus reducing overall device complexity.
3Reliability
If the storage circuit oscillates in random number generation mode, then pseudo random bit values are produced, but the stability of output bit value changes
Solution Approach 1:
The storage circuit is designed to dynamically switch between two operational modes: normal mode for stable data storage and random number generation mode for generating pseudo random bit values. This dynamic operation allows the circuit to maintain stability when needed while enabling oscillation for random number generation, resolving the contradiction between stability and random value generation.
Solution Approach 2:
The circuit employs periodic mode switching between normal operation and random number generation. During random number generation mode, the circuit oscillates periodically to produce random bit values, then transitions back to normal mode for stable operation. This periodic action allows the circuit to generate pseudo random values while maintaining overall system stability.
Data Source
AI summary
A storage circuit 2 in the form of a master slave latch includes a slave stage 6 serving as a bit storage circuit. The slave stage 6 includes an inverter chain which when operating in a normal mode includes an even number of inverters 10, 12 and when operating in an random number generation mode includes an odd number of inverters 10, 12, 14 and so functions as a free running ring oscillator. When a switch is made back from the random number generation mode to the normal mode, then the oscillation ceases and a stable pseudo random bit value is output from the bit value storage circuit 6.


