Storage Circuitry Error Correction via Bit Merging
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Solution Overview
Problem
Increasing the storage capacity of data processing apparatuses without adding more storage cells leads to increased circuit size and power consumption, and existing error correction methods require additional storage space.
Innovation Solution
The apparatus accesses pairs of storage lines simultaneously, using error bits generated by algorithms like CRC to detect and correct errors, allowing an additional data value to be stored without increasing the number of bit cells, by encoding the further data value within the error bits or data bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If extra storage space is added to store check bits for error detection and correction, then error detection and correction capability is improved, but circuit size and power consumption increase
Solution Approach 1:
The patent merges the storage of data values and check bits into the same storage circuitry by utilizing the most significant bits of data lines to store check bits for paired less significant bits. This consolidation eliminates the need for separate storage circuitry for error correction codes, thereby improving reliability without increasing circuit size or power consumption.
2Reliability
If extra storage space is added to store check bits for error detection and correction, then error detection and correction capability is improved, but power consumption increases
Solution Approach 1:
The patent merges the storage of data values and check bits into the same storage circuitry by utilizing the most significant bits of data lines to store check bits for paired less significant bits. This consolidation eliminates the need for separate storage circuitry for error correction codes, thereby improving reliability without increasing circuit size or power consumption.
3Quantity of substance
If the number of bit cells is increased to increase storage capacity, then storage capacity is improved, but circuit size and power consumption increase
Solution Approach 1:
The patent makes the storage circuitry multi-functional by enabling it to store both data values and check bits simultaneously within the same bit cells. The most significant bits serve dual purposes as both data storage and error correction code storage, thereby increasing effective storage capacity without adding more bit cells or increasing circuit size.
4Quantity of substance
If the number of bit cells is increased to increase storage capacity, then storage capacity is improved, but power consumption increases
Solution Approach 1:
The patent makes the storage circuitry multi-functional by enabling it to store both data values and check bits simultaneously within the same bit cells. The most significant bits serve dual purposes as both data storage and error correction code storage, thereby increasing effective storage capacity without adding more bit cells or increasing power consumption.
Data Source
AI summary
A data processing apparatus is provided, which includes storage circuitry comprising a plurality of lines, each of the plurality of lines comprising a data value. Access circuitry accesses a pair of the plurality of lines at a time, the pair of the plurality of lines comprising a further data value, distinct from the data value, and a plurality of error bits to detect or correct errors in the data value in each line in the pair of the plurality of lines.