Semiconductor Storage Device Compaction Automation
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Solution Overview
Problem
Conventional semiconductor storage devices face inefficiencies in compaction processing due to software-executed restoration sequences, which degrade CPU performance and lead to access latency when numerous unused regions are not restored in time.
Innovation Solution
A semiconductor storage device architecture that includes a queuing buffer, read module, separating module, write command issuing module, and write module to manage and execute compaction operations efficiently, reducing CPU intervention and improving system performance by automating the restoration of invalid pages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If restoration processing is executed manually through software on CPU, then the compaction process can be performed, but CPU performance deteriorates and access latency increases
Solution Approach 1:
The patent replaces the software-based CPU execution mechanism with a dedicated hardware restoration sequence generator. The restoration sequence is generated by a restoration sequence generator circuit that operates independently of the CPU, and is executed by a restoration sequence executor circuit. This substitution of the mechanical/software system with a dedicated hardware system eliminates CPU intervention in the compaction process, thereby resolving the contradiction between performing restoration processing and maintaining CPU performance.
2Reliability
If restoration processing is delayed to avoid CPU intervention, then CPU performance is maintained, but access latency increases due to accumulated unused regions
Solution Approach 1:
The patent implements preliminary action by continuously generating and preparing restoration sequences in advance, rather than waiting for CPU intervention or accumulating unused regions. The restoration sequence generator operates proactively to maintain the flash memory structure, ensuring that restoration processing is performed before access latency becomes problematic. This allows the system to maintain both CPU performance stability and low access latency simultaneously.
3Loss of time
If restoration processing is executed frequently to maintain performance, then access latency is reduced, but system complexity and CPU load increase
Solution Approach 1:
The patent implements self-service by enabling the flash memory system to perform its own restoration processing autonomously without requiring CPU intervention. The restoration sequence generator and restoration sequence executor form a self-contained hardware system that manages compaction operations independently. This self-service mechanism reduces system complexity from the CPU's perspective while maintaining low access latency, as the restoration processing is handled by dedicated hardware circuits rather than through CPU software routines.
Data Source
AI summary
According to one embodiment, a semiconductor storage device includes a queuing buffer, a read module, a separating module, a write command issuing module, and a write module. The write command issuing module is configured to add a write address indicated by write pointer information to the management data obtained by the separating module in order to issue a write command, and to automatically queue the write command into the queuing buffer. The write module is configured to supply the write command issued by the write command issuing module to the nonvolatile memory in order to write data into the nonvolatile memory.