Storage Compute Device Logical Block Address Space Segmentation
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Solution Overview
Problem
Traditional computing setups face bottlenecks in processing large data sets due to limitations in RAM and slower non-volatile memory, leading to underutilization of CPU resources and inefficiencies in data communication between memory and processors.
Innovation Solution
A storage compute device is used to perform computations on large data sets using a reserved logical block address space, allowing for internal processing and communication of commands and data without altering existing storage protocols, leveraging non-volatile memory for increased performance and parallel processing capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional computing setups use RAM and non-volatile memory for processing large data sets, then data storage capacity is available, but processing speed and resource utilization are limited due to bottlenecks in data communication between memory and processors
Solution Approach 1:
The patent segments the address space into distinct portions: a first portion for receiving host commands and a second portion for sending computation results. This segmentation allows parallel processing operations where commands and data can be simultaneously accessed without interfering with each other, thereby improving processing speed and resource utilization.
Solution Approach 2:
The patent introduces an intermediary address space structure that mediates between the host and the storage compute device. This intermediary logical block address space enables efficient data communication and command transmission without requiring changes to existing storage protocols, resolving the bottleneck in data communication between memory and processors.
2Productivity
If existing storage protocols are modified to enable computation capabilities, then processing performance improves, but system complexity and compatibility issues increase
Solution Approach 1:
The patent implements multi-functionality by enabling the storage compute device to handle both traditional storage operations and computation tasks through the same interface. The logical block address space is designed to support multiple functions: receiving host commands, transmitting data, and returning computation results, all without requiring separate protocols or interfaces.
Solution Approach 2:
Instead of modifying storage protocols to add computation capabilities, the patent inverts the approach by using existing storage protocols unchanged and implementing computation capabilities through a reserved address space mechanism. This allows computation functionality to be added without altering the fundamental storage protocol structure.
3Productivity
If a reserved address space is used for command execution, then computation efficiency improves, but address space management complexity increases
Solution Approach 1:
The patent applies preliminary action by reserving specific address spaces in advance: a first portion for host commands and a second portion for computation results. This pre-allocation of address spaces eliminates the need for dynamic address management during computation operations, simplifying address space management while maintaining high computation efficiency.
Data Source
AI summary
A logical block address space of a storage compute device is reserved for use in executing commands from a host. First data is received at a first portion of the logical block address space, the first data causing a computation to be performed by the storage compute device. Second data is sent to the host via a second portion of the logical block address space, the second data describing a result of the computation.