Multi-Processor Storage Configuration Update

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Solution Overview

Problem

As computer systems grow in storage capacity, the amount of configuration information needed to manage them increases, leading to longer processing times and reduced efficiency in allocating or deallocating storage, which affects marketability and value.

Innovation Solution

A method and system that utilize multiple processors to independently update system configuration information, where a first processor identifies candidate information and sends an update request to a second processor, allowing for efficient sharing of operations across processors to manage storage allocation and deallocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single processor is used to manage system configuration information, then the system structure is simple, but the processing time increases and productivity decreases as storage capacity grows

Engineering Contradiction:
Improvestorage allocation rateVSAvoidprocessing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the configuration information management into two distinct phases: identification phase (performed by first processor) and update phase (performed by second processor). This segmentation allows concurrent processing of different operations, eliminating the bottleneck of sequential single-processor handling and improving storage allocation rate while reducing processing time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first processor performs preliminary identification of candidate system configuration information before the actual update occurs. By pre-identifying which configuration entries need updating and preparing the update requests in advance, the system minimizes the time required for the actual update operation, thereby improving overall productivity and reducing processing time.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple processors are used to update configuration information, then productivity improves, but device complexity increases

Engineering Contradiction:
Improvestorage allocation rateVSAvoidprocessor coordination complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary mechanism in the form of structured update requests that contain all necessary information (candidate configuration information, new values, and operation details). This intermediary data structure serves as a contract between the first and second processors, enabling coordinated multi-processor operation without requiring complex inter-processor communication protocols or synchronization mechanisms, thus limiting the increase in device complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If configuration information is updated frequently, then the system adapts to storage changes, but I/O operations increase and performance deteriorates

Engineering Contradiction:
Improveconfiguration update capabilityVSAvoidI/O operation frequency
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the configuration update operations from the main storage allocation workflow and performs them as separate, optimized batch operations. By separating the identification of configuration changes from the actual update execution, the system can accumulate multiple configuration changes and apply them in a single I/O operation, reducing the frequency of I/O operations while maintaining full adaptability to storage changes.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8131969B2Updating system configuration information
Publication Date: 2012.03.06 SEAGATE TECH LLC
  • US8131969B2 patent drawing
  • US8131969B2 patent drawing
  • US8131969B2 patent drawing

AI summary

A data storage system and associated method comprising system configuration information; a first processor adapted for identifying a portion of the system configuration information in response to a configuration change request to the memory space, and for signaling an update request incident with the configuration change request to a second processor; and a second processor adapted for updating the portion in response to the update request and independently of the first processor.