Storage Controller Cache Write-Back Threshold Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In storage systems, the parallel processing of write requests can lead to insufficient processing performance for physical disks due to cache memory depletion, resulting in delays in allocating cache regions for I/O requests, especially when write back processes are concentrated on a single RAID, causing performance degradation and potential timeouts.
Innovation Solution
A storage controlling apparatus that includes a processor to count data not written in storage volumes for each access request, determining if the ratio of dirty data to allocated data exceeds a threshold, and performing a write back process to free cache memory, thereby preventing cache depletion and reducing allocation delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If parallel write back processes are executed for multiple logical volumes allocated to one physical disk, then cache memory free capacity is secured faster, but the processing performance of the physical disk becomes insufficient
Solution Approach 1:
The patent segments the write back process by controlling the number of parallel processes per physical disk. Specifically, it limits concurrent write back operations to one per physical disk while allowing multiple logical volumes per disk, thereby preventing disk overload while still enabling parallelism across different disks. This segmentation resolves the contradiction by distributing the write back load appropriately across the storage subsystem.
Solution Approach 2:
The system dynamically adjusts the number of parallel write back processes based on the physical disk configuration. When multiple logical volumes are allocated to the same physical disk, the system reduces the parallel write back count for that disk to avoid overwhelming it. This dynamic control allows the system to optimize between cache utilization and disk processing capacity in real-time.
2Device complexity
If write back process is performed periodically or upon cache depletion, then cache memory management is simplified, but delay occurs in allocation of cache memory for write requests
Solution Approach 1:
The patent implements feedback control by continuously monitoring the number of dirty data blocks and the state of free cache memory. When the dirty data ratio exceeds a threshold or free cache becomes insufficient, the system triggers write back operations. This feedback mechanism allows the system to respond proactively to cache conditions, preventing depletion delays while maintaining manageable complexity through rule-based control.
Solution Approach 2:
The system performs write back operations preliminarily when the dirty data ratio reaches a threshold before actual cache depletion occurs. This preliminary action ensures that cache memory is freed in advance, preventing allocation delays for incoming write requests while avoiding the need for complex predictive algorithms.
3Quantity of substance
If multiple logical volumes are allocated to one physical disk to increase storage capacity, then storage efficiency is improved, but write back processing becomes a bottleneck
Solution Approach 1:
The patent segments the write back processing by physical disk, controlling the parallel process count per disk based on the number of logical volumes allocated to it. This segmentation allows efficient utilization of disks with fewer logical volumes while preventing bottlenecks on disks handling multiple logical volumes, thereby maintaining overall write back productivity despite high storage capacity utilization.
Solution Approach 2:
The system applies different write back control strategies to different physical disks based on their specific configuration. Disks with multiple logical volumes receive limited parallel write back processes, while disks with fewer logical volumes can handle more concurrent operations. This local quality adjustment optimizes write back processing for each disk's capabilities, resolving the bottleneck issue while preserving storage efficiency.
Data Source
AI summary
A storage controlling apparatus includes a processor, wherein the processor: controls a first counter configured to count, among data stored in a cache memory and relating to an access request, a number of data which are not written in storage volumes of a target of the access request, for each storage volume; determines, in response to reception of a first access request, whether or not a first ratio of a counter value of the first counter to a number of data allocated already to the cache memory into a first storage volume exceeds a first threshold value, the counter value of the first counter corresponding to the first storage volume which is a target of the first access request; and performs a write back process of data from the cache memory into the first storage volume where the first ratio exceeds the first threshold value.