Storage Controller CRC Signature Verification for Data Recovery
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Solution Overview
Problem
Existing data storage devices, such as solid state drives (SSDs), face challenges in ensuring end-to-end data protection during read operations, as they often return uncorrectable error correction code (UECC) errors even when the original data is valid.
Innovation Solution
The solution involves a controller in the data storage device calculating a cyclic redundancy code (CRC) signature for decoded data and comparing it with a CRC signature generated during the write operation. If the signatures do not match, the controller re-issues the read command, using a different volatile memory buffer to store the decoded data, thereby confirming whether the error is from the read path or not.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the data storage device returns a UECC error when the FMU CRC signature does not match, then data integrity is protected, but the entire ECC decoding potential is wasted even when the original data is valid
Solution Approach 1:
The patent segments the error detection process into two stages: first checking FMU-level CRC signatures for quick validation, then performing full ECC decoding only when necessary. This segmentation allows the system to quickly identify and discard obviously corrupted data while giving valid data with mismatched FMU signatures a chance to be recovered through full ECC decoding, thus resolving the contradiction between reliability and productivity.
Solution Approach 2:
The patent performs preliminary FMU CRC signature checking before committing to returning a UECC error. This preliminary action allows the system to quickly filter out clearly corrupted data blocks while preserving the opportunity to recover valid data that may have experienced transient errors or signature mismatches, thereby improving read operation efficiency without compromising data integrity.
2Reliability
If the data storage device performs full ECC decoding for every read operation, then data validity is ensured, but the read operation time increases
Solution Approach 1:
The patent divides the error checking process into hierarchical levels: first performing quick FMU CRC signature verification on segmented data blocks, then performing full ECC decoding only on segments that fail the initial check. This segmented approach ensures data validity through multiple layers of verification while minimizing the time impact by limiting full ECC decoding to only necessary cases.
Solution Approach 2:
The patent implements partial error checking through FMU CRC signature verification as a preliminary step before full ECC decoding. This partial action provides sufficient error detection for most cases while avoiding the time cost of complete ECC decoding for every read operation, thus resolving the contradiction between reliability and time loss.
3Device complexity
If the data storage device uses a single volatile memory buffer for decoded data, then device complexity is reduced, but error detection accuracy during re-read operations is limited
Solution Approach 1:
The patent extracts the error detection function from the single buffer structure by implementing a separate re-read mechanism with alternative buffer allocation. When a CRC mismatch occurs, the system can extract the data for re-reading using a different buffer, allowing independent verification of whether the error persisted or was transient, thus improving error detection accuracy without significantly increasing overall device complexity.
Solution Approach 2:
The patent changes the buffer allocation parameter dynamically based on error detection results. Instead of using a fixed single buffer, the system adjusts buffer usage by allocating alternative buffers for re-read operations when CRC mismatches occur, enabling more accurate error detection while maintaining relatively simple device architecture through parameter-based flexibility rather than structural complexity.
Data Source
AI summary
In order to guarantee data validity of data read from a memory device of the data storage device to a host device, a controller of the data storage device may calculate a cyclic redundancy code (CRC) signature of the decoded data and compare the CRC signature of the decoded data with a CRC signature of the data. The CRC signature of the data is generated during a write operation of the data to the memory device. Rather than returning an uncorrectable error correction code error (UECC) error to the host device when the CRC signature of the decoded data does not match the CRC signature of the data, the controller executes the read command again. By using a different buffer to store the decoded data, the controller may confirm whether the error stemmed from the read path or the error was not from the read path.