Storage Controller Data State Shaping for NAND Reliability
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Solution Overview
Problem
As the number of bits stored in a memory cell increases, it becomes increasingly difficult to identify and write data robustly due to the exponential increase in the number of states, leading to challenges in error correction and data reliability.
Innovation Solution
A storage device with a controller that shapes write data from binary format to n-ary format, reducing the number of states, performing error correction encoding, and storing mapping information in a table to manage the data, thereby increasing the number of possible states during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of bits stored in one memory cell increases, then the storage capacity increases, but the number of states expressed by the memory cell increases exponentially making it increasingly difficult to identify and write data robustly
Solution Approach 1:
The patent applies parameter changes by transforming the data representation from binary (2 states per bit) to ternary (3 states per symbol). This fundamental parameter change in the data encoding system allows the memory device to handle multi-level cell states more effectively, improving reliability while maintaining high storage capacity. The controller converts binary data to ternary data before writing to the memory device, and performs reverse conversion during reading, thereby resolving the contradiction between high storage capacity and data reliability.
2Adaptability or versatility
If the number of states expressed by a memory cell increases, then the storage capacity increases, but it becomes increasingly difficult to identify and write data robustly
Solution Approach 1:
The patent introduces an intermediary ternary data representation system between the binary data from the host and the multi-level memory cell storage. The controller acts as a mediator that converts binary data to ternary data for storage, and converts ternary data back to binary data for host access. This intermediary representation simplifies the identification and writing of data in multi-state memory cells, reducing the complexity while maintaining high adaptability.
3Quantity of substance
If the number of bits per memory cell increases, then the storage density increases, but error correction and data reliability become more challenging
Solution Approach 1:
The patent implements feedback mechanisms through error detection and correction codes that are integrated into the data processing pipeline. The controller performs error detection on read data and applies correction algorithms before converting ternary data back to binary data. This feedback loop continuously monitors and corrects errors, making error detection and measurement manageable even as storage density increases with more bits per memory cell.
Data Source
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AI summary
A storage device includes a nonvolatile memory device that includes a plurality of pages, each of which includes a plurality of memory cells, and a controller that receives first write data expressed by 2m states (m being an integer greater than 1) from an external host device. The controller in a first operating mode shapes the first write data to second write data, which are expressed by "k" states (k being an integer greater than 2) smaller in number than the 2m states, performs first error correction encoding on the second write data to generate third write data expressed by the "k" states, and transmits the third write data to the nonvolatile memory device for writing at a selected page from the plurality of pages.