Multi-Engine Storage Controller Descriptor Scheduling
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Solution Overview
Problem
In multi-engine storage controllers, the processing rate is bottlenecked by hardware engines, leading to inefficiencies in data processing due to head of line blocking and underutilization of engines, especially when handling high-speed interfaces like PCIe and SAS, where multiple engines are required to match throughput but face complexities in distributing tasks and maintaining IO coherency.
Innovation Solution
A method and system for scheduling commands in a multi-engine storage controller that identifies idle engines and schedules input segments based on their associated processing operations, allowing out-of-order processing while maintaining sequence integrity and utilizing a descriptor read controller to buffer and reorder completed tasks to ensure output order matches input order.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple data processing engines are integrated into the system to match interface throughput, then processing bandwidth is improved, but device complexity and task distribution complexity increase
Solution Approach 1:
The patent segments the data processing workload across multiple independent hardware engines (e.g., four DIF engines for PCIe Gen 3 interface). Each engine processes specific data blocks independently, allowing parallel execution while maintaining overall processing throughput. This segmentation enables the system to match high-speed interface bandwidth requirements without creating a single point of bottleneck.
Solution Approach 2:
The patent introduces a descriptor controller as an intermediary component that manages task distribution among multiple engines. The descriptor controller receives input segments, determines engine availability, and schedules tasks appropriately. This intermediary layer abstracts the complexity of multi-engine coordination from the overall system, simplifying task distribution while enabling parallel processing across multiple engines.
2Speed
If commands are scheduled onto multiple engines in parallel, then processing speed is improved, but maintaining IO coherency and processing order becomes more difficult
Solution Approach 1:
The patent applies preliminary actions by having the descriptor controller determine engine availability and schedule tasks before actual processing begins. The controller checks which engines are idle and which input streams are currently being processed, then proactively assigns new segments to appropriate engines. This preliminary scheduling ensures that parallel processing maintains proper sequencing and IO coherency without requiring complex synchronization during execution.
Solution Approach 2:
The patent implements feedback mechanisms where the descriptor controller continuously monitors engine status and input stream processing states. Based on this feedback, the controller dynamically adjusts task scheduling decisions to maintain processing order and IO coherency. The system uses status information from engines and input streams to make informed scheduling decisions, ensuring that parallel processing does not compromise data integrity or processing sequence.
3Reliability
If strict sequential processing is maintained for each input stream, then IO coherency is preserved, but engine utilization and bandwidth efficiency decrease
Solution Approach 1:
The patent applies dynamic scheduling where the descriptor controller flexibly assigns input segments to different engines based on real-time availability. Instead of statically binding each input stream to a specific engine, the system dynamically determines which idle engine can process the next segment. This dynamic approach allows multiple engines to be utilized efficiently while maintaining sequential processing integrity within each input stream through proper scheduling decisions.
Data Source
AI summary
A method and apparatus, such as multi-engine controller that can be used to control multiple data processing engines in a command based IO processing system, such as a storage controller, to solve to the problem of scaling the data processing rate to match the advances in the IO interface data rates, including a method of identifying dependencies among various tasks queued up in the system and scheduling tasks out-of-order to avoid head of line blocking, a method to buffer and reorder the completed tasks such that the task output order is the same as that in the input to the system.