Storage Controller Data Integrity via Host-Attached EDC
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current storage devices, such as SSDs, do not protect data during transmission through the controller, leading to potential errors undetected due to lack of error detection mechanisms, and adding error detection codes can deteriorate write efficiency and cause communication issues.
Innovation Solution
Implementing a storage device with a controller that includes a non-volatile memory and a redundant area for error detection codes, ensuring data protection across the entire transmission path without compromising write efficiency by using consistent error detection codes (EDC) or error correcting codes (ECC) generated by the ECC circuit, which are added to the data from the host to the NAND memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error detection codes (EDC) or error correcting codes (ECC) are added to data during transmission through the controller, then data reliability is improved, but write efficiency deteriorates
Solution Approach 1:
The patent applies preliminary action by generating and attaching EDC/ECC codes to data before it enters the controller. The host device performs error detection code generation on the original data and attaches these codes as metadata before transmission. This preliminary protection ensures that data is safeguarded against controller failures from the outset, without requiring additional error handling operations during the write process, thus maintaining write efficiency while improving reliability.
2Reliability
If error detection codes are added to data, then data integrity is improved, but communication issues arise
Solution Approach 1:
The patent uses the attached error detection codes as an intermediary mechanism between the host and storage device. These codes serve as a mediator that enables error detection without requiring changes to the underlying communication protocol. The codes are attached as metadata that travels with the data through the controller, allowing error detection functionality to be added without disrupting existing communication interfaces or causing compatibility issues.
3Device complexity
If data is protected only at endpoints (host to controller and controller to NAND memory), then device complexity is reduced, but data protection coverage is insufficient
Solution Approach 1:
The patent extends preliminary action to cover the entire data transmission path. By having the host generate and attach error detection codes before data enters the controller, the protection coverage is extended to include the controller's internal processing path. This creates continuous protection from the host through the controller to the NAND memory, eliminating the previously unprotected gap without adding complex error handling mechanisms within the controller itself.
Data Source
AI summary
In general, according to an embodiment, a storage device includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of pages, each of the pages including a data area of a first size and a redundant area of a second size smaller than the first size. The controller is configured to receive, from a host, a write command, receive, from the host, transfer data associated with the write command. The transfer data includes write data of the first size appended with a first error detection code for the write data. The controller is further configured to store the write data into the data area of one of the pages and the first error detection code into the redundant area of the one of the pages.