Storage Controller Error Detection Mode Switching
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Solution Overview
Problem
Existing storage systems face increased costs and performance degradation due to the requirement of numerous hardware components for error detection, which is necessary for identifying faulty portions and preventing data transfer errors.
Innovation Solution
A storage system with a dual-chip configuration, where one chip is coupled to the host computer and another to the storage device, utilizing CPU software to detect errors only when necessary, allowing for error detection without extensive hardware and reducing performance degradation by switching between normal and all-check modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple hardware portions for error detection are disposed, then error detection capability is improved, but system cost increases
Solution Approach 1:
The patent implements dynamic switching between normal mode (using only second portions for error detection) and all check mode (using both first and second portions). This dynamic adjustment of error detection intensity based on system state allows the system to maintain high reliability when needed while reducing hardware utilization costs during normal operation, thereby resolving the contradiction between error detection capability and system cost.
Solution Approach 2:
The patent changes the operational parameter of error detection by switching between two distinct modes: normal mode with limited error detection (second portions only) and all check mode with comprehensive error detection (first and second portions). This parameter change allows the system to adapt error detection resources to actual needs, avoiding continuous high-cost operation while maintaining reliability when errors are detected.
2Reliability
If comprehensive error detection is performed continuously, then faulty portion identification is improved, but performance degradation increases
Solution Approach 1:
The patent implements periodic comprehensive error detection by switching to all check mode only when errors are detected in normal mode. Instead of continuous comprehensive checking, the system performs intensive error detection periodically triggered by error events, thereby maintaining faulty portion identification capability while minimizing performance degradation during normal high-productivity operations.
Solution Approach 2:
The patent applies partial error detection (using only second portions) during normal operation, which is sufficient for most cases. Comprehensive error detection (using both first and second portions) is applied excessively only when needed, i.e., when errors are detected. This partial/excessive action strategy maintains reliability while avoiding continuous performance degradation.
Data Source
AI summary
Provided is a storage system which is connected to a host computer and whereby data is read and written. The storage system comprises: a storage device which stores the data; and a storage controller wherein an error is detected by one of a plurality of first sections which are sections upon a transfer path of the data with respect to the storage device in a full check mode, an error is detected by one of second sections which are fewer than the first sections in a regular mode, and a switch is made to the full check mode when the error is detected in the regular mode.