Storage Controller Error Restoration via Segmented Architecture

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Solution Overview

Problem

Storage controllers for non-volatile memory devices face challenges in efficiently restoring errors in lower-level controllers, which can lead to data loss and system damage due to the lack of effective error recovery mechanisms.

Innovation Solution

A storage controller architecture with a higher-level controller and a lower-level controller, where the lower-level controller includes an operation memory to store operation codes and data, allowing the higher-level controller to perform error restoring operations based on state information to revert the lower-level controller to a previous state before the error occurred, thereby suspending operations and resetting only the affected components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error restoration is implemented in storage controller, then system reliability is improved, but device complexity increases due to higher-level controller architecture

Engineering Contradiction:
Improveerror restoration capabilityVSAvoidcontroller architecture
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The storage controller is divided into two distinct levels: a lower-level controller that manages basic memory operations and a higher-level controller that handles error restoration. This segmentation allows the error restoration function to be added without completely redesigning the entire controller, isolating complexity to specific modules while maintaining overall system reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The higher-level controller performs preliminary error detection and restoration actions before the lower-level controller fails completely. By monitoring the lower-level controller's operation and preemptively restoring errors, the system maintains reliability without requiring the entire controller to be designed for failure scenarios from the ground up.

Inventive Principle:
Principle #10Preliminary action

2Loss of substance

If lower-level controller error restoration is performed, then data loss is minimized, but operation time increases due to error checking and restoring processes

Engineering Contradiction:
Improvedata lossVSAvoiderror restoration time
Core Design Contradiction:
Loss of substanceVSLoss of time

Solution Approach 1:

The higher-level controller continuously monitors the lower-level controller's operation and receives feedback about error conditions. This feedback mechanism allows the system to detect errors early and initiate restoration processes quickly, minimizing both data loss and the time required for recovery by responding to actual error conditions rather than performing continuous full-system checks.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The error restoration process focuses only on the specific portion of the lower-level controller that has encountered an error, rather than restoring the entire system. This partial action approach minimizes the time required for restoration while still preventing data loss in the affected areas, avoiding unnecessary full-system restoration overhead.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11500728B2Storage controller and method of restoring error of the same
Publication Date: 2022.11.15 SAMSUNG ELECTRONICS CO LTD
  • US11500728B2 patent drawing
  • US11500728B2 patent drawing
  • US11500728B2 patent drawing

AI summary

A storage controller includes a host interface configured to perform communication with a host device, a memory interface configured to perform communication with a nonvolatile memory device, a higher-level controller, and a lower-level controller. The higher-level controller issues operations to be performed by the nonvolatile memory device based on requests transferred through the host interface. The lower-level controller includes an operation memory configured to store an operation code and operation data. The lower-level controller controls the memory interface based on the operation code and the operation data such that the nonvolatile memory device performs issued operations received from the higher-level controller. The higher-level controller performs, when an error occurs in the lower-level controller, an error restoring operation based on state information of the lower-level controller to restore the lower-level controller to a previous state corresponding to a state before the error occurs.