Storage Controller Testing Using Host Memory Scenarios

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Solution Overview

Problem

Existing storage devices face limitations in testing due to resource constraints, as their own resources are typically allocated for original functions, limiting the availability for testing purposes.

Innovation Solution

A storage device that includes a controller configured to access an external memory and execute test scenarios using commands from an external host device, leveraging host memory for testing operations, and generating human-readable results without direct involvement of the host processor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the storage device uses its own internal resources for testing, then testing can be performed autonomously, but the resources are limited because they are allocated for original functions

Engineering Contradiction:
Improvetest convenienceVSAvoidavailable resources for testing
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent transitions from using internal storage resources to utilizing external host memory resources for test code and data storage. This dimensional shift from device-internal to host-external resources resolves the resource limitation by accessing memory space beyond the storage device's own capacity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The host device acts as an intermediary, providing memory resources and test scenarios to the storage device. The storage device executes tests using host-provided test codes stored in host memory, with the host coordinating the testing process through command interfaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the host processor is directly involved in testing operations, then comprehensive control can be achieved, but it delays the host processor's other tasks

Engineering Contradiction:
Improvetesting controlVSAvoidhost processor task delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The storage device performs testing autonomously by executing test codes independently once received from the host. The device self-manages the test execution process, data storage operations, and result generation without requiring continuous host processor intervention, thereby freeing the host for other tasks.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The host processor prepares test scenarios and provides test codes to the storage device before the actual testing begins. This preliminary setup allows the storage device to execute tests independently afterward, reducing the need for real-time host involvement during test execution.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If complex test scenarios are executed to improve coverage, then testing thoroughness increases, but the complexity of test management increases

Engineering Contradiction:
Improvetest coverageVSAvoidtest scenario management
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts complex test scenario management from the storage device and places it in the host device. The host prepares, stores, and manages comprehensive test scenarios in its memory, while the storage device simply executes the provided test codes, reducing the management burden on the storage device.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12511207B2Storage device and method of testing storage device
Publication Date: 2025.12.30 SAMSUNG ELECTRONICS CO LTD
  • US12511207B2 patent drawing
  • US12511207B2 patent drawing
  • US12511207B2 patent drawing

AI summary

A storage device including: a nonvolatile memory; and a controller configured to control the nonvolatile memory, wherein the controller is configured to: obtain authority to access an external memory, wherein the external memory is allocated by an external host device; receive a test scenario, which includes a plurality of commands, from the external host device; read a first test code corresponding to a first test check point from the external memory when the first test check point arrives while the test scenario is executed; and execute the first test code.