Storage Controller List Management Circuit for Data Access
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Solution Overview
Problem
The existing data access methods in rewritable non-volatile memory storage devices experience system delays due to the time-consuming process of searching for memory addresses in host memory lists, which reduces data access efficiency.
Innovation Solution
A data transmission method and storage controller with a list management circuit that buffers physical region page pointer lists, allowing for efficient data transfer by reading and buffering the necessary page pointers, thereby reducing system delays and improving data access speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the storage controller sequentially accesses data by reading the list from host memory to obtain memory addresses, then the data access operation can be completed, but system delay occurs and data access efficiency is reduced
Solution Approach 1:
The patent applies preliminary action by pre-reading and buffering the physical region page pointer list (PRP list) from host memory into the list management circuit before actual data transfer operations begin. This allows the storage controller to have the address mapping information ready in advance, eliminating the need to search and read the list during data access operations, thereby reducing system delay and improving data access efficiency
Solution Approach 2:
The patent introduces the list management circuit as an intermediary component between the host memory and the data transfer management circuit. This intermediary buffers the PRP list and provides quick access to memory address information, acting as a mediator that eliminates the bottleneck of sequential list reading and improves overall system performance
Data Source
AI summary
A data transmission method is provided. The method includes receiving a transmission command from a host system, wherein the transmission command includes a starting logical block address, a number of logical blocks, a first physical region page pointer, and a second physical region page pointer, wherein the transmission command is configured to transmit target data between at least one target logical block of a rewritable non-volatile memory module and at least one target memory page of a host memory; buffering a plurality of entries of at least one physical region page pointer list corresponding to the transmission command if the second physical region page pointer is a first list starting address of a first physical region page pointer list corresponding to the transmission command; and transmitting corresponding data according to the buffered entries.