Storage Controller Map Data Management via Host Memory Offloading
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As the capacity of NAND flash memory in storage devices increases, the capacity of map data also grows, requiring a high-capacity buffer memory, which escalates development costs.
Innovation Solution
A computing device with a storage device that includes a nonvolatile memory, an internal buffer memory, and a storage controller, where the storage controller sends map data to a memory through a bus during initialization, and the memory controller stores and manages partial map data between the storage device and the memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the capacity of NAND flash memory increases, then the storage capacity is improved, but the capacity of map data increases requiring a high-capacity buffer memory which increases development costs
Solution Approach 1:
The patent divides the buffer memory into two parts: an internal buffer memory integrated with the storage device and an external buffer memory located in the host system. This segmentation allows the storage device to function with a smaller internal buffer while utilizing the host's larger external buffer memory capacity, thereby reducing development costs for high-capacity buffer memory in the storage device itself.
Solution Approach 2:
The patent enables the host system's memory to serve dual purposes: as system memory for the host's own operations and as an extended buffer memory for the storage device. This multi-functionality allows the external memory to handle map data for the storage device while maintaining its primary role, eliminating the need for dedicated high-capacity buffer memory in the storage device.
2Reliability
If a high-capacity dedicated buffer memory is used in the storage device, then the management of large amounts of map data is improved, but the development costs increase
Solution Approach 1:
The patent introduces a buffer memory interface that acts as an intermediary between the storage device controller and the host system memory. This interface enables efficient communication and data transfer, allowing the storage device to utilize the host's memory resources while maintaining reliable map data management. The intermediary layer ensures proper protocol handling and data integrity without requiring expensive dedicated high-capacity buffer memory in the storage device.
3Quantity of substance
If the buffer memory capacity is increased to manage larger map data, then the map data storage capability is improved, but the device complexity and cost increase
Solution Approach 1:
The patent transitions from a single-dimension buffer memory architecture (internal only) to a two-dimension architecture by adding the external buffer memory in the host system. This dimensional expansion allows the system to leverage the host's existing memory resources, effectively increasing map data capacity without proportionally increasing the storage device's own buffer memory complexity and cost.
Data Source
AI summary
A computing device includes a storage device and a memory. The storage device includes nonvolatile and internal buffer memories, and a storage controller that controls the nonvolatile and internal buffer memories and communicates with a bus. The memory includes a buffer memory and a memory controller that controls the buffer memory and communicates with the bus. The nonvolatile memory stores user data and map data. In an initialization operation, the storage controller sends the map data to the memory through the bus, and the memory controller stores the map data that is transferred from the storage device through the bus, in the buffer memory. After the initialization operation, the memory controller sends partial map data of the map data to the storage device through the bus, and the storage controller stores the partial map data that is transferred from the memory through the bus, in the internal buffer memory.