Storage Controller Mapping-Table Caching for Random LBA Reads
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The inefficiency in reading data from non-volatile memory due to the need to repeatedly load multiple mapping tables when dealing with large numbers of files stored in discontinuous and random logical block addresses, leading to decreased reading speed.
Innovation Solution
A storage controller and method that optimizes data reading by loading a mapping table for a first file, identifying and copying target content from that table for subsequent files to a buffer memory, and overwriting it with a new mapping table, thereby reducing the need for repeated loading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple mapping tables are loaded to handle files stored in discontinuous and random logical block addresses, then the storage device can access files distributed across different mapping tables, but the reading time increases due to the need to load multiple mapping tables
Solution Approach 1:
The patent applies preliminary action by loading mapping tables into the buffer memory in advance before actual data reading operations. The storage controller pre-loads mapping tables that may be needed for subsequent file access operations, so when reading commands arrive, the mapping information is already available in the buffer memory, eliminating the need to load mapping tables from non-volatile memory during the actual reading process.
Solution Approach 2:
The patent implements beforehand cushioning by maintaining multiple mapping tables simultaneously in the buffer memory, creating a cushion of pre-loaded mapping information. This cushion allows the system to handle multiple file access requests without needing to repeatedly load mapping tables from non-volatile memory, thus reducing reading time for files distributed across different mapping tables.
2Adaptability or versatility
If mapping tables are repeatedly loaded to read files with discontinuous logical block addresses, then all files can be accessed, but the reading speed decreases
Solution Approach 1:
The storage controller performs preliminary loading of mapping tables into buffer memory before data reading operations. By having mapping tables pre-loaded in the buffer memory, the system can quickly translate logical block addresses to physical block addresses without repeated loading delays, thus maintaining high reading speed for files with discontinuous logical block addresses.
Solution Approach 2:
The patent applies copying by creating copies of mapping tables in the buffer memory. Instead of loading mapping tables from non-volatile memory repeatedly during data reading, the system copies the necessary mapping table data into the buffer memory once, and then uses these copies for multiple address translations, significantly improving reading speed.
3Speed
If the mapping table containing an LBA is loaded into RAM, then the LBA can be quickly translated to PBA, but additional loading operations are required if the mapping table is not already in RAM
Solution Approach 1:
The storage controller loads mapping tables into buffer memory in advance based on prediction of which mapping tables will be needed for upcoming read operations. This preliminary loading ensures that when LBA to PBA translation is needed, the mapping table is already in RAM, providing fast translation speed without requiring additional loading operations during data reading.
Solution Approach 2:
The storage controller implements a self-service mechanism by automatically managing the loading and caching of mapping tables in the buffer memory. The controller monitors read commands and proactively loads required mapping tables before they are needed for translation, making the system self-sufficient in managing its own memory resources without external intervention.
Data Source
AI summary
A storage controller, a data reading method and a storage device. data reading method: identifying a plurality of logical addresses corresponding to files based on file read commands; determining a plurality of mapping tables corresponding to files based on logical addresses; loading a first mapping table corresponding to a first file to a first memory section of a buffer memory; identifying one or more second logical addresses of one or more second files corresponding to first mapping table among files or than first file; determining target content of first mapping table based on one or more second logical addresses, and copying target content to a second memory section of buffer memory; and from target content, finding a fourth physical address corresponding to a fourth logical address of a fourth file among second files, to read fourth data of fourth file, so as to respond to a fourth file read command.