Computational Storage Controller Memory Access Control

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Solution Overview

Problem

In computational storage systems, there is a risk of erroneous or malicious code causing requests to be sent to the wrong device, leading to potential data loss or corruption due to the lack of effective access control and memory protection mechanisms.

Innovation Solution

Implementing a unique identifier tagging system where each computational storage device is assigned a unique tag, which is included in the logical block address of requests, allowing only matching devices to process requests and denying unauthorized access, thereby preventing improper read or write operations in shared memory areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multiple computational storage devices share a common memory area to improve resource utilization and reduce complexity, then device complexity is reduced and resource efficiency is improved, but the risk of data loss and corruption increases due to lack of access control

Engineering Contradiction:
Improvememory management complexityVSAvoiddata integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The common memory area is segmented into function-specific allocated regions, where each compute function is assigned a dedicated memory space. The controller circuit enforces access control by comparing memory access requests against the function's allocated region, preventing unauthorized access to other functions' memory spaces while maintaining efficient shared memory architecture.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If compute functions are allowed to access any location in the common memory area to improve operational flexibility, then ease of operation is improved, but the risk of erroneous or malicious code causing data loss increases

Engineering Contradiction:
Improvememory access flexibilityVSAvoiddata loss risk
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

Each compute function is granted specific access permissions (read/write) to specific memory regions within the common memory area, rather than universal access. The controller circuit enforces these localized permissions by checking whether memory access requests fall within the function's authorized regions, providing targeted access control that maintains operational flexibility while preventing harmful access.

Inventive Principle:
Principle #3Local quality

3Reliability

If access control mechanisms are implemented to prevent unauthorized memory access and protect data integrity, then reliability is improved, but device complexity increases due to additional control logic

Engineering Contradiction:
Improvedata protectionVSAvoidcontroller circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The controller circuit is pre-configured with the allocated memory regions and access permissions for each compute function before operations begin. This preliminary setup allows the controller to efficiently enforce access control by simply checking whether requests fall within pre-defined boundaries, rather than requiring complex real-time analysis of access patterns or user credentials.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4372568A1Near storage computation system and methods for data protection
Publication Date: 2024.05.22 SAMSUNG ELECTRONICS CO LTD
  • EP4372568A1 patent drawingFigure 1
  • EP4372568A1 patent drawingFigure 2A~2B
  • EP4372568A1 patent drawingFigure 2C

AI summary

Systems and methods for data protection. In some embodiments, a computational storage device includes a controller circuit, a first compute function of a first application, a second compute function of the first application, a common memory area; and a persistent storage device. The controller circuit may be configured: to receive a first request from a host, the first request defining a first allocated function data memory region, for the first compute function; to receive a first memory access request, from the first compute function, for a first memory location in the common memory area and outside the first allocated function data memory region; and to deny the first memory access request.