Storage Controller Memory-Based Authentication for Flash Access
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Solution Overview
Problem
The increasing number of primary devices accessing embedded flash memory leads to a sharp increase in permission information, occupying large register areas and increasing chip costs and power consumption.
Innovation Solution
The storage controller obtains permission information from the memory instead of storing it in registers, using a bus parser, authentication control circuit, and interface adapter to authenticate operations, reducing the need for register space and lowering power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If permission information is stored in registers to manage access control for multiple primary devices, then authentication capability is improved, but chip area and power consumption increase sharply
Solution Approach 1:
The patent extracts the permission information storage function from the register and relocates it to the memory device. The register now only stores a pointer or reference to the permission information location in memory, rather than storing the actual permission data. This extraction reduces the register area requirement while maintaining the authentication capability, as the permission information is retrieved from memory when needed.
Solution Approach 2:
The patent transitions from a one-dimensional storage solution (register) to a two-dimensional storage architecture (register + memory). The register serves as a fast-access index or pointer storage, while the memory provides the actual permission information storage. This dimensional change allows the system to handle large quantities of permission information without proportionally increasing register area.
2Reliability
If permission information is stored in registers to manage access control for multiple primary devices, then authentication capability is improved, but power consumption increases
Solution Approach 1:
By extracting the bulk permission information storage from the register to memory, the patent reduces the continuous power consumption associated with maintaining large register states. The register now only needs to maintain small pointer values, significantly reducing its power consumption while authentication capability is preserved through on-demand retrieval from memory.
Solution Approach 2:
The patent implements periodic or on-demand retrieval of permission information from memory rather than continuously maintaining it in registers. The authentication control circuit accesses permission information from memory only when authentication is required, reducing overall power consumption compared to keeping all permission information continuously active in registers.
3Measurement precision
If fine-grained permissions are implemented for multiple primary devices, then access control precision is improved, but register area occupation increases sharply
Solution Approach 1:
The patent segments the permission information storage into two parts: a small segment in the register (pointer/reference) and a large segment in memory (actual permission data). This segmentation allows fine-grained permissions to be maintained with high precision while the register area occupation remains small, as only the pointer needs to be stored in the register.
Solution Approach 2:
The patent extracts the detailed fine-grained permission information from the register to memory, allowing the register to only store compact references. This extraction enables the system to maintain high permission granularity without the register area increasing proportionally with the detail level of permissions.
Data Source
AI summary
This application relates to the field of data security technologies, and in particular, to a storage controller and a control method thereof, a storage system, and a micro controller unit, to resolve a problem of excessively large area overheads caused because a register configured to store permission information is configured in the storage controller. The storage controller includes: a bus parser, configured to parse an operation instruction sent by a primary device by using a bus, to obtain a to-be-performed operation and a target address of the operation; an authentication control circuit, configured to: obtain permission information of a sub-region in which the target address is located from a memory, and determine, whether permission of the operation meets a requirement; and an interface adapter, configured to send the operation instruction to the memory when the permission of the operation meets the requirement.