Storage Controller Program Mode Switching for Mixed Write Workloads

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Solution Overview

Problem

The operational efficiency of storage devices, particularly in write operations, is compromised due to varying workloads and types of data commands, leading to performance degradation.

Innovation Solution

A controller is configured to switch between cache and normal program modes based on the size and properties of data to be written, using a program mode setting module to optimize the write operation efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the controller uses a single program mode for all write operations, then the device complexity is low, but the productivity decreases due to inability to optimize for different workload types

Engineering Contradiction:
Improvewrite operation efficiencyVSAvoidcontroller structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The controller dynamically switches between cache program mode and normal program mode based on the characteristics of incoming write commands. The program mode setting module determines whether to use cache mode (for sequential writes) or normal mode (for random writes), allowing the system to adapt its behavior to different workload types and maintain high productivity without excessive complexity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The controller changes the program mode parameter based on command characteristics. When a sequential write command is detected, the system switches to cache program mode; when random write commands are detected, it switches to normal program mode. This parameter change enables optimization of write operations for different workload types

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the controller switches program modes frequently to optimize for each command, then the productivity improves, but the loss of time increases due to mode switching overhead

Engineering Contradiction:
Improveprogram operation efficiencyVSAvoidmode switching delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The program mode setting module determines the appropriate program mode in advance, before the actual write operation begins. By predicting whether sequential or random writes will occur and pre-setting the mode, the system avoids time-consuming mode switching during critical write operations, thus reducing loss of time while maintaining high productivity

Inventive Principle:
Principle #10Preliminary action

3Speed

If the controller uses cache program mode for all writes, then the speed of write operations increases, but the reliability decreases due to performance degradation with random writes

Engineering Contradiction:
Improvewrite speedVSAvoidoperational stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The controller applies different program modes to different write operation contexts. Cache program mode with higher speed is applied locally to sequential write operations where it is effective, while normal program mode is applied to random write operations to maintain reliability. This local differentiation allows the system to achieve high speed where possible without sacrificing overall operational stability

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20260111366A1Storage device, controller, and operating method of controller, capable of improving efficiency of program mode
Publication Date: 2026.04.23 SK HYNIX INC
  • US20260111366A1 patent drawing
  • US20260111366A1 patent drawing
  • US20260111366A1 patent drawing

AI summary

According to embodiments of the present disclosure, if write operations for a memory block with efficient write operations according to a cache program mode and a memory block with a different property are mixed, the write operation is performed by switching the cache program mode to a normal program mode. Accordingly, it is possible to prevent or reduce performance degradation of the cache program mode due to a workload in which write operations of different property are mixed, thereby improving write operation efficiency.