Storage Controller Network Interface Error Correction

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Solution Overview

Problem

Current storage systems face challenges with packet loss during communication processing, leading to increased latency and decreased throughput, particularly in long-distance data transfer, and require costly lossless devices or retransmission methods that are inefficient and costly.

Innovation Solution

A network interface for storage controllers that includes a processor and memory to execute protocol processing, generating error correction packets and reproducing missing packets from error correction groups, reducing the need for retransmissions and lossless devices, and enabling flexible protocol support without hardware updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If retransmission methods are used to handle packet loss, then data reliability is improved, but data transfer efficiency deteriorates due to increased latency and additional packet exchanges

Engineering Contradiction:
Improvedata reliabilityVSAvoiddata transfer efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by generating and transmitting error correction packets alongside data packets before packet loss occurs. The transmitting side creates redundancy packets that contain error correction information, allowing the receiving side to reconstruct lost packets without requiring retransmission requests. This proactive approach eliminates the reactive delay of ARQ protocols while maintaining data reliability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If lossless devices are used to prevent packet loss, then data reliability is improved, but system cost increases significantly

Engineering Contradiction:
Improvedata reliabilityVSAvoidsystem cost
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent uses inexpensive software-based error correction packets as disposable redundancy objects. Instead of investing in costly lossless hardware devices, the system generates lightweight error correction information that can be easily transmitted and processed. These software-based correction packets provide reliable packet recovery without the high capital expenditure required for specialized lossless network equipment.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Adaptability or versatility

If software-based error correction is used instead of hardware solutions, then adaptability to different protocols is improved, but processing complexity increases

Engineering Contradiction:
Improveprotocol adaptabilityVSAvoidprocessing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements universality by designing a software-based error correction mechanism that can operate across multiple protocols including TCP, UDP, NVMe-oF, and Fibre Channel. The error correction packet generation and processing logic is protocol-agnostic, allowing the same software framework to provide reliable data transfer across different network protocols without requiring protocol-specific hardware modifications.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11855778B2Network interface for storage controller
Publication Date: 2023.12.26 HITACHI VANTARA LTD
  • US11855778B2 patent drawing
  • US11855778B2 patent drawing
  • US11855778B2 patent drawing

AI summary

A network interface for a storage controller includes a processor and a memory that stores an instruction code to be executed by the processor. The processor executes protocol processing for transmitting and receiving packets via a network. The processor reproduces a first packet not received from the network, from a plurality of other received packets included in an error correction packet group same as that of the first packet.