Storage Controller Offset Compensation Using Memory Region Extraction
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Solution Overview
Problem
The size of storage controllers for nonvolatile memory devices is increased due to the need for offset compensation information, which is typically stored in electrical fuses, leading to larger device sizes and reduced storage capacity.
Innovation Solution
A storage device with a storage controller that includes a nonvolatile memory device with separate regions for user data and trimming control codes, where the trimming control codes compensate for analog circuit offsets and are obtained through a wafer-level test, replacing the need for electrical fuses and allowing for reduced controller size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If offset compensation information is stored in electrical fuses of the storage controller, then the analog circuits can be compensated for offsets, but the size of the storage controller increases
Solution Approach 1:
The patent extracts the offset compensation information storage function from the storage controller's electrical fuses and relocates it to the nonvolatile memory device. Specifically, trimming control codes are stored in a dedicated first region of the nonvolatile memory device, separating the compensation data storage from the controller hardware, thereby reducing controller size while maintaining offset compensation capability
Solution Approach 2:
The patent introduces a first region in the nonvolatile memory device as an intermediary storage location for trimming control codes. This intermediary region acts as a bridge between the wafer-level test process and the operational storage device, allowing offset compensation data to be transferred and stored outside the controller while still being accessible for compensation operations
2Reliability
If electrical fuses are used to store trimming control codes, then offset compensation is achieved, but the storage capacity of the controller is reduced
Solution Approach 1:
The patent extracts the trimming control code storage function from the controller's electrical fuse block and relocates it to the nonvolatile memory device's first region. This extraction frees up controller resources and increases available storage capacity while preserving the offset compensation functionality needed for analog circuit performance
Solution Approach 2:
The patent moves the storage of trimming control codes from the controller dimension to the memory device dimension. By utilizing the first region of the nonvolatile memory device (which can be a single level cell block) for storing compensation data, the system leverages the memory device's larger storage capacity to accommodate trimming codes without impacting controller storage resources
Data Source
AI summary
Example embodiments provide for a storage device that includes a storage controller including a plurality of analog circuits and at least one nonvolatile memory device including a first region and a second region. The at least one nonvolatile memory device stores user data in the second region and stores trimming control codes in the first region as a compensation data set. The trimming control codes are configured to compensate for offsets of the plurality of analog circuits and are obtained through a wafer-level test on the storage controller. The storage controller, during a power-up sequence, reads the compensation data set from the first region of the at least one nonvolatile memory device, stores the read compensation data set therein, and adjusts the offsets of the plurality of analog circuits based on the stored compensation data set.