Data Storage Controller Memory Persistence via PCIe Mapping

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Solution Overview

Problem

Existing data storage systems face challenges in ensuring persistent data storage during power loss events, as conventional methods like uninterruptable power supplies and power generators are costly and do not fully address data loss issues.

Innovation Solution

A RAID on chip-based data storage controller exposes volatile local memory as addressable memory to a host system, mapping it to a PCIe compliant memory space, and uses backup logic to copy data to non-volatile memory upon power events, ensuring data persistence through power restoration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If volatile memory is used for low-latency storage, then access speed is improved, but data persistence during power loss deteriorates

Engineering Contradiction:
Improvememory access speedVSAvoiddata persistence
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent combines volatile memory (for speed) and non-volatile memory (for persistence) into a unified storage system. The controller merges these two memory types so that the host system accesses them through a single interface, achieving both low-latency access and data persistence without requiring separate management systems.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The storage controller acts as an intermediary between the host system and the combined volatile/non-volatile memory system. It transparently handles data placement, caching, and persistence operations, allowing the host to access fast volatile memory while the controller ensures data is safely stored in non-volatile memory during power events.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If uninterruptible power supplies are deployed to protect volatile memory, then data persistence is improved, but system cost and complexity increase

Engineering Contradiction:
Improvedata persistenceVSAvoidpower supply system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the power protection function from the main volatile memory system and places it directly in the storage controller. By integrating non-volatile memory and power event detection within the controller, the system eliminates the need for external uninterruptible power supplies while maintaining data persistence during power events.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The storage controller performs self-protection against power loss by monitoring power events and automatically triggering data persistence operations. The controller independently detects power failures and ensures data is saved to non-volatile memory without requiring external power protection infrastructure.

Inventive Principle:
Principle #25Self-service

3Loss of time

If volatile memory is exposed directly to host system, then access latency is reduced, but data loss risk during power events increases

Engineering Contradiction:
Improveaccess latencyVSAvoiddata loss risk
Core Design Contradiction:
Loss of timeVSLoss of information

Solution Approach 1:

The system performs preliminary actions by pre-positioning data in volatile memory for fast access while simultaneously maintaining persistence capabilities. The controller proactively manages data between volatile and non-volatile memory, ensuring that frequently accessed data resides in fast memory while backup copies or critical data are maintained in persistent storage before power events occur.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9021141B2Data storage controller and method for exposing information stored in a data storage controller to a host system
Publication Date: 2015.04.28 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9021141B2 patent drawing
  • US9021141B2 patent drawing
  • US9021141B2 patent drawing

AI summary

A data storage controller exposes information stored in a locally managed volatile memory store to a host system. The locally managed volatile memory store is mapped to a corresponding portion of a peripheral component interconnect express (PCIe) compliant memory space managed by the host system. Backup logic in the data storage controller responds to a power event detected at the interface between the data storage controller and the host system by copying the contents of the volatile memory store to a non-volatile memory store on the data storage controller. Restore logic restores a data storage controller state by copying the contents of the non-volatile memory store to the locally managed volatile memory store upon the application of power such that the data in the volatile memory store is persistent even in the event of a loss of power to the host system and or the data storage controller.