Storage Controller Power Reduction via Dynamic Bandwidth Analysis

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Solution Overview

Problem

Storage controllers in computer systems consume excessive power due to their processing capabilities exceeding the requirements of underlying storage configurations, leading to inefficient power usage.

Innovation Solution

Implementing a method to detect underutilized storage configurations and reduce the clock frequency of storage controller components, thereby minimizing power consumption without compromising performance, by determining the target memory frequency based on front-end and back-end bandwidths and RAID multipliers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If storage controller processing capabilities are increased to handle various RAID configurations, then performance and versatility are improved, but power consumption increases

Engineering Contradiction:
ImproveRAID configuration handling capabilityVSAvoidstorage controller power consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The storage controller dynamically adjusts its operating characteristics based on the detected storage configuration and workload requirements. The system monitors RAID configuration parameters and automatically configures processing capabilities to match actual needs, avoiding continuous operation at maximum power consumption while maintaining ability to handle various RAID configurations when required

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters such as clock frequency, memory bandwidth, and processing throughput based on detected RAID configuration and actual workload demands. By adjusting these parameters dynamically rather than maintaining fixed high-capability settings, the storage controller achieves adaptability to different RAID configurations while reducing power consumption during lower-demand operations

Inventive Principle:
Principle #35Parameter changes

2Productivity

If storage controller memory bandwidth is increased to improve processing speed, then productivity is improved, but power consumption increases

Engineering Contradiction:
Improvedata processing throughputVSAvoidstorage controller power consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The storage controller implements dynamic memory bandwidth adjustment based on actual processing demands. The system continuously monitors workload characteristics and RAID configuration, then adapts memory clock frequency and bandwidth allocation accordingly, providing high throughput when needed while reducing power consumption during lower-demand periods

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The storage controller is designed with multi-functional memory subsystems that can operate at different bandwidth levels. The same memory infrastructure serves multiple functions including caching, buffering, and data processing, with operational characteristics adjusted based on detected storage configuration requirements rather than maintaining constant high-performance settings

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10254814B2Storage system bandwidth determination
Publication Date: 2019.04.09 HEWLETT PACKARD ENTERPRISE DEV LP
  • US10254814B2 patent drawing
  • US10254814B2 patent drawing
  • US10254814B2 patent drawing

AI summary

Techniques for reducing power consumption of a storage controller are provided. An example method includes determining a back-end bandwidth of a storage system, wherein the back-end of the storage system includes a storage drive communicatively coupled to a storage controller. The method also includes determining a front-end bandwidth of the storage system, wherein the front-end of the storage system includes a front-end bus coupling the storage controller to a host. The method also includes computing a target back-end memory bandwidth based on the back-end bandwidth and computing a target front-end memory bandwidth based on the front-end bandwidth. The method also includes reducing power consumption of the storage controller by reducing a clock frequency of a memory device of the storage controller based on the greater of the target back-end memory bandwidth and the target front-end memory bandwidth.